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ISL8102 Datasheet(PDF) 9 Page - Intersil Corporation |
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ISL8102 Datasheet(HTML) 9 Page - Intersil Corporation |
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9 / 27 page  9 FN9247.0 October 19, 2005 external series gate resistors as this might lead to shoot- through. PGOOD (Pin 28) PGOOD is used as an indication of the end of soft-start. It is an open-drain logic output that is low impedance until the soft- start is completed and Vout is equal to the VID setting. Once in normal operation PGOOD indicates whether the output voltage is within specified overvoltage and undervoltage limits. If the output voltage exceeds these limits or a reset event occurs (such as an overcurrent event), PGOOD becomes high impedance again. The potential at this pin should not exceed that of the potential at VCC pin by more than a typical forward diode drop at any time OVP (Pin 22) Overvoltage protection pin. This pin pulls to VCC when an overvoltage condition is detected. Connect this pin to the gate of an SCR or MOSFET tied across VIN and ground to prevent damage to a load device. Operation Multi-Phase Power Conversion Modern low voltage DC/DC converter load current profiles have changed to the point that the advantages of multi- phase power conversion are impossible to ignore. The technical challenges associated with producing a single- phase converter that is both cost-effective and thermally viable have forced a change to the cost-saving approach of multi-phase. The ISL8102 controller helps simplify implementation by integrating vital functions and requiring minimal external components. The block diagram on page 2 provides a top level view of multi-phase power conversion using the ISL8102 controller. Interleaving The switching of each channel in an ISL8102-based converter is timed to be symmetrically out of phase with the other channel. As a result, the two-phase converter has a combined ripple frequency twice the frequency of one of its phases. In addition, the peak-to-peak amplitude of the combined inductor currents is proportionately reduced (Equations 1 and 2). Increased ripple frequency and lower ripple amplitude generally translate to lower per-channel inductance and lower total output capacitance for a given set of performance specifications. Figure 1 illustrates the additive effect on output ripple frequency. The two channel currents (IL1 and IL2), combine to form the AC ripple current and the DC load current. The ripple component has two times the ripple frequency of each individual channel current. To understand the reduction of ripple current amplitude in the multi-phase circuit, examine the equation representing an individual channel peak-to-peak inductor current. In Equation 1, VIN and VOUT are the input and output voltages respectively, L is the single-channel inductor value, and FSW is the switching frequency. The output capacitors conduct the ripple component of the inductor current. In the case of multi-phase converters, the capacitor current is the sum of the ripple currents from each of the individual channels. Compare Equation 1 to the expression for the peak-to-peak current after the summation of N symmetrically phase-shifted inductor currents in Equation 2. Peak-to-peak ripple current decreases by an amount proportional to the number of channels. Output voltage ripple is a function of capacitance, capacitor equivalent series resistance (ESR), and inductor ripple current. Reducing the inductor ripple current allows the designer to use fewer or less costly output capacitors. Another benefit of interleaving is to reduce input ripple current. Input capacitance is determined in part by the maximum input ripple current. Multi-phase topologies can improve overall system cost and size by lowering input ripple current and allowing the designer to reduce the cost of input capacitance. The example in Figure 2 illustrates input currents from a two-phase converter combining to reduce the total input ripple current. FIGURE 1. PWM AND INDUCTOR-CURRENT WAVEFORMS FOR 2-PHASE CONVERTER PWM2 PWM1 IL2 IL1 IL1 + IL2 IPP VIN VOUT – () V OUT ⋅ LFSW VIN ⋅⋅ ---------------------------------------------------------- = (EQ. 1) ICPP , VIN NVOUT ⋅ – () V OUT ⋅ LFSW V ⋅ IN ⋅ -------------------------------------------------------------------- = (EQ. 2) ISL8102 |
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