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X9118 Datasheet(PDF) 8 Page - Intersil Corporation |
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X9118 Datasheet(HTML) 8 Page - Intersil Corporation |
8 / 20 page 8 FN8161.1 March 25, 2005 Table 4. Wiper Control Register, WCR (10-bit), WCR9–WCR0: Used to store the current wiper position (Volatile, V) Table 5. Data Register, DR (10-bit), Bit 9–Bit 0: Used to store wiper positions or data (Non-Volatile, NV) Four of the six instructions are four bytes in length. These instructions are: – Read Wiper Counter Register – read the current wiper position of the potentiometer, – Write Wiper Counter Register – change current wiper position of the potentiometer, – Read Data Register – read the contents of the selected Data Register; – Write Data Register – write a new value to the selected Data Register. The basic sequence of the four byte instructions is illustrated in Figure 3. These four-byte instructions exchange data between the WCR and one of the Data Registers. A transfer from a data register to a WCR is essentially a write to a static RAM, with the static RAM controlling the wiper position. The response of the wiper to this action will be delayed by tWRL. A transfer from the WCR (current wiper position), to a data register is a write to nonvolatile memory and takes a minimum of tWR to complete. The transfer can occur between the potentiometer and one of its associated registers. Two instructions (see Figure 4) require a two-byte sequence to complete. These instructions transfer data between the host and the X9118; either between the host and one of the Data Registers or directly between the host and the Wiper Counter Register. These instructions are: – XFR Data Register to Wiper Counter Register – This transfers the contents of one specified Data Register to the Wiper Counter Register. – XFR Wiper Counter Register to Data Register – This transfers the contents of the specified Wiper Counter Register to the specified Data Register. See Instruction format for more details. Other POWER UP AND DOWN REQUIREMENTS At all times, the V+ voltage must be greater than or equal to the voltage at RH or RL, and the voltage at RH or RL must be greater than or equal to the voltage at V-. During power up and power down, VCC, V+, and V- must reach their final values with 1msec of each other. Figure 3. Two-Byte Instruction Sequence WCR9 WCR8 WCR7 WCR6 WCR5 WCR4 WCR3 WCR2 WCR1 WCR0 VVVVVVVVVV (MSB) (LSB) Bit 9Bit 8Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0 NV NV NV NV NV NV NV NV NV NV MSB LSB S T A R T 01 0 1 0A1 A0 R/W A C K I2 I1 I0 0 RBRA0 A C K SCL SDA S T O P 0 00 ID3 ID2 ID1 ID0 Device ID Internal Instruction Opcode Address Register Address X9118 |
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