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X9428YS Datasheet(PDF) 1 Page - Intersil Corporation |
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X9428YS Datasheet(HTML) 1 Page - Intersil Corporation |
1 / 20 page 1 ® FN8197.0 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9428 Low Noise/Low Power/2-Wire Bus Single Digitally Controlled Potentiometer (XDCP™) FEATURES • Solid state potentiometer • 2-wire serial interface • Register oriented format —Direct Read/Write/Transfer Wiper Position —Store as many as Four Positions per Potentiometer • Power supplies —VCC = 2.7V to 5.5V —V+ = 2.7V to 5.5V —V– = -2.7V to -5.5V • Low power CMOS —Standby current < 1µA —Ideal for Battery Operated Applications • High reliability —Endurance–100,000 Data Changes per Bit per Register —Register Data Retention–100 years • 4-bytes of nonvolatile memory •10k Ω resistor array • Resolution: 64 taps each potentiometer • SOIC and TSSOP packages DESCRIPTION The X9428 integrates a digitally controlled potentiometers (XDCP) on a monolithic CMOS integrated microcircuit. The digitally controlled potentiometer is implemented using 63 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the 2-wire bus interface. Each potentiometer has associated with it a volatile Wiper Counter Register (WCR) and 4 nonvolatile Data Registers (DR0:DR3) that can be directly written to and read by the user. The contents of the WCR controls the position of the wiper on the resistor array through the switches. Power-up recalls the contents of DR0 to the WCR. The XDCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing. BLOCK DIAGRAM R0 R1 R2 R3 Wiper Counter Register (WCR) Interface and Control Circuitry SCL SDA A0 A2 A3 VH/RH VL/RL Data 8 VW/RW WP VCC VSS V+ V– Data Sheet March 8, 2005 |
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