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X9429WV14Z Datasheet(PDF) 1 Page - Intersil Corporation |
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X9429WV14Z Datasheet(HTML) 1 Page - Intersil Corporation |
1 / 21 page 1 ® FN8248.2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9429 Low Noise/Low Power/2-Wire Bus Single Digitally Controlled Potentiometer (XDCP™) FEATURES • Single Voltage Potentiometer • 64 Resistor Taps • 2-wire Serial Interface for Write, Read, and Transfer Operations of the Potentiometer • Wiper Resistance, 150 Ω Typical at 5V • Non-Volatile Storage of Multiple Wiper Positions • Power-on Recall. Loads Saved Wiper Position on Power-up. • Standby Current < 5µA Max •VCC : 2.7V to 5.5V Operation • 2.5k Ω, 10kΩ Total Pot Resistance • Endurance: 100, 000 Data Changes per Bit per Register • 100 yr. Data Retention • 14 Ld TSSOP, 16 Ld SOIC • Low Power CMOS • Pb-Free Plus Anneal Available (RoHS Compliant) DESCRIPTION The X9429 integrates a single digitally controlled potentiometer (XDCP) on a monolithic CMOS integrated circuit. The digital controlled potentiometer is implemented using 63 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the 2-wire bus interface. The potentiometer has associated with it a volatile Wiper Counter Register (WCR) and a four non-volatile Data Registers that can be directly written to and read by the user. The contents of the WCR controls the position of the wiper on the resistor array though the switches. Powerup recalls the contents of the default data register (DR0) to the WCR. The XDCP can be used as a three-terminal potentiometer or as a two terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing. BLOCK DIAGRAM VH/RH VL/RL VW/RW POT VCC VSS 2-wire bus address data status write read wiper 64-taps transfer 10k Ω inc / dec control interface Bus Interface & Control Power-on Recall Wiper Counter Register (WCR) Data Registers 4 Bytes Data Sheet October 19, 2005 |
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