X9408YP24I-2.7 datasheet(5/21 Pages) INTERSIL

Part #	X9408YP24I-2.7

Description	Low Noise/Low Power/2-Wire Bus

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Manufacturer	INTERSIL [Intersil Corporation]

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5

FN8191.2

September 19, 2005

Acknowledge Polling

The disabling of the inputs, during the internal

Nonvolatile write operation, can be used to take

advantage of the typical 5ms EEPROM write cycle

time. Once the stop condition is issued to indicate the

end of the nonvolatile write command the X9408

initiates the internal write cycle. ACK polling can be

initiated immediately. This involves issuing the start

condition followed by the device slave address. If the

X9408 is still busy with the write operation no ACK will

be returned. If the X9408 has completed the write

operation an ACK will be returned and the master can

then proceed with the next operation.

Flow 1. ACK Polling Sequence

Instruction Structure

The next byte sent to the X9408 contains the instruction

and register pointer information. The four most

significant bits are the instruction. The next four bits

point to one of the two pots and when applicable they

point to one of four associated registers. The format is

shown below in Figure 2.

Figure 2. Instruction Byte Format

The four high order bits define the instruction. The

next two bits (R1 and R0) select one of the four

registers that is to be acted upon when a register

oriented instruction is issued. The last bits (P1, P0)

select which one of the four potentiometers is to be

affected by the instruction.

Four of the nine instructions end with the transmission

of the instruction byte. The basic sequence is

illustrated in Figure 3. These two-byte instructions

exchange data between the Wiper Counter Register

and one of the Data Registers. A transfer from a Data

Register to a Wiper Counter Register is essentially a

write to a static RAM. The response of the wiper to this

action will be delayed tWRL. A transfer from the Wiper

Counter Register (current wiper position), to a data

register is a write to nonvolatile memory and takes a

minimum of tWR to complete. The transfer can occur

between one of the four potentiometers and one of its

associated registers; or it may occur globally, wherein

the transfer occurs between all of the potentiometers

and one of their associated registers.

Four instructions require a three-byte sequence to

complete. These instructions transfer data between

the host and the X9408; either between the host and

one of the data registers or directly between the host

and the Wiper Counter Register. These instructions

are: Read Wiper Counter Register (read the current

wiper position of the selected pot), Write Wiper

Counter Register (change current wiper position of the

selected pot), Read Data Register (read the contents

of the selected nonvolatile register) and Write Data

Register (write a new value to the selected Data

Register). The sequence of operations is shown in

Figure 4.

Nonvolatile Write

Command Completed

Enter ACK Polling

Issue

START

Issue Slave

Address

ACK

Returned?

Further

Operation?

Issue

Instruction

Issue STOP

NO

YES

Proceed

Issue STOP

NO

Proceed

I1

I2

I3

I0

R1

R0

P1

P0

Wiper Counter

Register

Select

Instructions

Register Select

X9408

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