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X9520V20IA Datasheet(PDF) 8 Page - Intersil Corporation |
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X9520V20IA Datasheet(HTML) 8 Page - Intersil Corporation |
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8 / 33 page  8 FN8206.0 March 8, 2005 WCR and NVM. Therefore, the new “wiper position” set- ting is recalled into the WCR after V1 / Vcc of the X9520 has been powered down then powered back up If WT is “0” then a DCP Volatile Write is performed. This operation changes the DCP “wiper position” by writing new data to the associated WCR only. The contents of the associated NVM register remains unchanged. There- fore, when V1 / Vcc to the device is powered down then back up, the “wiper position” reverts to that last written to the DCP using a nonvolatile write operation. DCP Write Operation A write to DCPx (x = 0,1,2) can be performed using the three byte command sequence shown in Figure 9. In order to perform a write operation on a particular DCP, the Write Enable Latch (WEL) bit of the CONSTAT Reg- ister must first be set (See “BL1, BL0: Block Lock protec- tion bits - (Nonvolatile)” on page 13.) The Slave Address Byte 10101110 specifies that a Write to a DCP is to be conducted. An ACKNOWLEDGE is returned by the X9520 after the Slave Address, if it has been received correctly. Next, an Instruction Byte is issued on SDA. Bits P1 and P0 of the Instruction Byte determine which WCR is to be written, while the WT bit determines if the Write is to be volatile or nonvolatile. If the Instruction Byte format is valid, another ACKNOWLEDGE is then returned by the X9520. Following the Instruction Byte, a Data Byte is issued to the X9520 over SDA. The Data Byte contents is latched into the WCR of the DCP on the first rising edge of the clock signal, after the LSB of the Data Byte (D0) has been issued on SDA (See Figure 34). The Data Byte determines the “wiper position” (which FET switch of the DCP resistive array is switched ON) of the DCP. The maximum value for the Data Byte depends upon which DCP is being addressed (see Table below). Using a Data Byte larger than the values specified above results in the “wiper terminal” being set to the highest tap position. The “wiper position” does NOT roll-over to the lowest tap position. For DCP0 (64 Tap) and DCP2 (256 Tap), the Data Byte maps one to one to the “wiper position” of the DCP “wiper terminal”. Therefore, the Data Byte 00001111 (1510) corresponds to setting the “wiper terminal” to tap position 15. Similarly, the Data Byte 00011100 (2810) corresponds to setting the “wiper terminal” to tap position 28. The mapping of the Data Byte to “wiper position” data for DCP1 (100 Tap), is shown in “APPENDIX 1” . An example of a simple C language function which “trans- lates” between the tap position (decimal) and the Data Byte (binary) for DCP1, is given in “APPENDIX 2” . WT† Description 0 Select a Volatile Write operation to be performed on the DCP pointed to by bits P1 and P0 1 Select a Nonvolatile Write operation to be per- formed on the DCP pointed to by bits P1 and P0 0 0 WT 0 0 0 P1 P0 WRITE TYPE DCP SELECT † This bit has no effect when a Read operation is being performed. I5 I6 I7 I4 I3 I2 I1 I0 Figure 8. Instruction Byte Format S T A R T 101 01110 A C K WT 0 0 0 0 0 P1 P0 A C K S T O P A C K D7 D6 D5 D4 D3 D2 D1 D0 SLAVE ADDRESS BYTE INSTRUCTION BYTE DATA BYTE Figure 9. DCP Write Command Sequence P1 - P0 DCPx # Taps Max. Data Byte 00 x = 0 64 3Fh 0 1 x = 1 100 Refer to Appendix 1 1 0 x = 2 256 FFh 11 Reserved X9520 |
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