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X9440WV24-2.7 Datasheet(PDF) 3 Page - Intersil Corporation |
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X9440WV24-2.7 Datasheet(HTML) 3 Page - Intersil Corporation |
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3 / 21 page  3 FN8200.0 March 28, 2005 PIN CONFIGURATION PIN NAMES PRINCIPLES OF OPERATION The X9440 is a highly integrated microcircuit incorpo- rating two resistor arrays, two voltage comparators and their associated registers and counters; and the serial interface logic providing direct communication between the host and the digitally-controlled potenti- ometers and voltage comparators. Serial Interface The X9440 supports the SPI interface hardware con- ventions. The device is accessed via the SI input with data clocked in on the rising SCK. CS must be LOW and the HOLD and WP pins must be HIGH during the entire operation. The SO and SI pins can be connected together, since they have three state outputs. This can help to reduce system pin count. Array Description The X9440 is comprised of two resistor arrays and two voltage comparators. Each array contains 63 discrete resistive segments that are connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical potentiometer (VH and VL inputs). At both ends of each array and between each resistor segment is a CMOS switch connected to the wiper (VW) output. Within each individual array only one switch may be turned on at a time. These switches are controlled by a volatile wiper counter register (WCR). The six bits of the WCR are decoded to select, and enable, one of sixty-four switches. The WCR may be written directly, or it can be changed by transferring the contents of one of four associated data registers into the WCR. These data registers and the WCR can be read and written by the host system. Voltage Comparator The comparator compares the wiper voltage VW with the external input voltage VNI. The comparator and its logic level output are controlled by the shutdown, latch, and enable bits of the analog control register (ACR). Enable connects the comparator output to the VOUT pin, Latch memorizes the output logic state, and shutdown removes the analog section supply voltages to save power. The analog control register (ACR) is programmed using the SPI serial interface. The ACR may be written directly, or it can be changed by transferring the contents of one of four associated data registers into the ACR. These data registers and the ACR may be read and written by the host system. Symbol Description SCK Serial Clock S1, SO Serial Data A0-A1 Device Address VH0-VH1, VL0-VL1 Potentiometers (terminal equivalent) VW0–VW1 Potentiometers (wiper equivalent) VNI0, VNI1 Comparator Input Voltages VOUT0, VOUT1 Buffered Comparator Outputs WP Hardware Write Protection V+,V- Analog and Voltage Comparator Supplies VCC System Supply Voltage VSS System Ground NC No Connection VCC VL0 VH0 WP SI A1 1 2 3 4 5 6 7 8 9 10 24 23 22 21 20 19 18 17 16 15 V+ VOUT0 VNI0 NC A0 SO HOLD SCK NC VNI1 SOIC X9440 VSS VW0 14 13 11 12 CS VL1 VH1 VW1 VOUT1 V- 1 2 3 4 5 6 7 8 9 10 24 23 22 21 20 19 18 17 16 15 TSSOP X9440 14 13 11 12 SI A1 VL1 VH1 VW1 VSS NC V- V+ VOUT1 VOUT0 SCK HOLD VNI1 VNI0 S0 A0 VCC NC VL0 VH0 VW0 WP CS X9440 |
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