Electronic Components Datasheet Search |
|
X80001Q32I Datasheet(PDF) 4 Page - Intersil Corporation |
|
X80001Q32I Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 37 page 4 FN8148.0 March 18, 2005 VOL Output LOW Voltage (RESET, V1GOOD, V2GOOD, V3GOOD, V4GOOD, FAR, PWRGD) IOL = 4.0mA VEE + 0.4 V COUT (Note 1) Output Capacitance (RESET, V1GOOD, V2GOOD, V3GOOD, V4GOOD, FAR) VOUT = 0V 8 pF CIN (Note 1) Input Capacitance (MRH, MRC) VIN = 0V 6 pF VOC Overcurrent threshold VOC = VSENSE - VEE 45 50 55 mV VOCI Overcurrent threshold (Insertion) VOC = VSENSE - VEE PWRGD = HIGH Initial Power Up condition 135 150 165 mV VOVR Overvoltage threshold (rising) X80000 Referenced to VEE 3.85 3.90 3.95 V X80001 3.49 3.54 3.59 V VOVF Overvoltage threshold (falling) X80000 Referenced to VEE 3.82 3.87 3.92 V X80001 3.46 3.51 3.56 V VUV1R Undervoltage 1 threshold (rising) Referenced to VEE BATT-ON = VEE 2.19 2.24 2.29 V VUV1F Undervoltage 1 threshold (falling) 2.16 2.21 2.26 V VUV2R Undervoltage 2 threshold (rising) Referenced to VEE BATT-ON = VRGO 1.71 1.76 1.81 V VUV2F Undervoltage 2 threshold (falling) 1.68 1.73 1.78 V VDRAINF Drain sense voltage threshold (falling) Referenced to VEE 0.9 1 1.1 V VDRAINR Drain sense voltage threshold (rising) Referenced to VEE 1.2 1.3 1.4 V VTRIP1 (Note 1) EN1 Trip Point Voltage Referenced to VEE VRGO ÷ 2 V VTRIP2 (Note 1) EN2 Trip Point Voltage Referenced to VEE V VTRIP3 (Note 1) EN3 Trip Point Voltage Referenced to VEE V VTRIP4 (Note 1) EN4 Trip Point Voltage Referenced to VEE V AC CHARACTERISTICS tFOC Sense High to Gate Low 1.5 2.5 3.5 µs tFUV Under Voltage conditions to Gate Low 0.5 1 1.5 µs tFOV Overvoltage Conditions to Gate Low 1.0 1.5 2 µs tVFR Overvoltage/undervoltage failure recovery time to Gate =1V. VDD does not drop below 3V, No other failure conditions. 1.2 1.6 2 µs tBATT_ON Delay BATT_ON Valid 100 ns tMRC Minimum time high for reset valid on the MRC pin 5 µs tMRH Minimum time high for reset valid on the MRH pin 5 µs tMRCE Delay from MRC enable to PWRGD HIGH No Load 1.0 1.6 µs tMRCD Delay from MRC disable to PWRGD LOW Gate is On, No Load 200 400 ns tMRHE Delay from MRH enable to Gate Pin LOW IGATE = 60µA, No Load 1.0 1.6 2.4 µs Electrical Specifications Standard Settings Over the recommended operating conditions unless otherwise specified. (Continued) SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT X80000, X80001 |
Similar Part No. - X80001Q32I |
|
Similar Description - X80001Q32I |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |