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X80130 Datasheet(PDF) 4 Page - Intersil Corporation |
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X80130 Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 18 page 4 FN8152.0 January 20, 2005 Equivalent A.C. Output Load Circuit VTRIP4 V4MON Trip Point Voltage 0.85 3.5 V X80130 2.20 2.25 2.30 V X80131 0.85 0.90 0.95 V X80132 1.65 1.70 1.75 V X80133 0.85 0.90 0.95 V X80134 0.85 0.90 0.95 V VREF Voltage Reference Long Term Drift 10 years 0 100 mV AC CHARACTERISTICS tMR (Note 3) Minimum time high for reset valid on the MR pin 5 µs tMRE (Note 3) Delay from MR enable to V1GDO LOW 1.6 µs tDPOR (Note 3) Device Delay before Gate assertion 45 50 55 ms tTO (Note 3) ViGDO turn off time 50 ns Electrical Specifications (Standard Settings) Over the recommended operating conditions unless otherwise specified. (Continued) SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Electrical Specifications (Programmable Parameters) Over the recommended operating conditions unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tSPOR Delay before RESET assertion TPOR1 = 0 TPOR0 = 0 Factory Default 90 100 110 ms TPOR1 = 0 TPOR0 = 1 (Note 3) 450 500 550 ms TPOR1 = 1 TPOR0 = 0 (Note 3) 0.9 1 1.1 s TPOR1 = 1 TPOR0 = 1 (Note 3) 4.5 5 5.5 s tDELAYi Time Delay used in Power Sequencing (i = 1, 3, 4) TiD1 = 0 TiD0 = 0 Factory Default 90 100 110 ms TiD1 = 0 TiD0 = 1 (Note 3) 450 500 550 ms TiD1 = 1 TiD0 = 0 (Note 3) 0.9 1 1.1 s TiD1 = 1 TiD0 = 1 (Note 3) 4.5 5 5.5 s 5V SDA 30pF 4.6k Ω RESET 30pF V1GDO, 5V 4.6k Ω 30pF V3GDO, V4GDO 5V 4.6k Ω A.C. Test Conditions Input pulse levels VCC x 0.1 to VCC x 0.9 Input rise and fall times 10ns Input and output timing levels VCC x 0.5 Output load Standard output load X80130, X80131, X80132, X80133, X80134 |
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