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TLV320AIC33IRGZ Datasheet(PDF) 2 Page - Texas Instruments |
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TLV320AIC33IRGZ Datasheet(HTML) 2 Page - Texas Instruments |
2 / 13 page TLV320AIC33 MAY 24, 2005 PRELIMINARY INFORMATION REV.17 2 The product described herein is a prototype product. TI makes no warranty, either expressed, implied, or statutory, including any implied warranty or merchantability or fitness for a specific purpose, as to this product. www.ti.com The information contined here concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. Copyright © 2004, Texas Instruments Incorporated SIMPLIFIED BLOCK DIAGRAM LINE_OUT_L+ LINE_OUT_L- LINE_OUT_R+ LINE_OUT_R- MONO_OUT+ MONO_OUT- HPR+ HPL-/HPLCOM HPL+ MIC2/LINE2L+ MIC2/LINE2L- MIC1/LINE1L+ MIC1/LINE1L- MIC1/LINE1R+ MIC1/LINE1R- MIC3/LINE3R MIC3/LINE3L PGA 0/+59.5dB 0.5dB steps ADC ADC Audio Serial Bus DAC L DAC R SPI / I2C Serial Control Bus Audio Clock Generation Bias/ Reference Voltage Supplies Volume Ctl & Effects Volume Ctl & Effects MIC2/LINE2R- MIC2/LINE2R+ + + VCM + + + HPR-/HPRCOM/ SPKFC + VCM + PGA 0/+59.5dB 0.5dB steps + + Figure 1. Simplified codec block diagram |
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