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MC33166D2T Datasheet(PDF) 11 Page - ON Semiconductor |
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MC33166D2T Datasheet(HTML) 11 Page - ON Semiconductor |
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11 / 20 page  MC34166, MC33166 http://onsemi.com 11 4 2 1 5 3 + CF RF R1 1.5 k CO 1000 VO 28 V/0.6 A R2 EA Reference Thermal Oscillator S R Q PWM UVLO ILIMIT Vin 12 V Cin 330 + 6.8 k 4.7 k 0.47 Q1 D1 1N5822 + *Gate resistor RG, zener diode D3, and diode D4 are required only when Vin is greater than 20 V. L 190 µH *RG 620 D3 1N967A D2 1N5822 Q2 MTP3055EL D4 1N4148 + + Test Conditions Results Line Regulation Vin = 8.0 V to 24 V, IO = 0.6 A 23 mV = ± 0.41% Load Regulation Vin = 12 V, IO = 0.1 A to 0.6 A 3.0 mV = ± 0.005% Output Ripple Vin = 12 V, IO = 0.6 A 100 mVpp Short Circuit Current Vin = 12 V, RL = 0.1 Ω 4.0 A Efficiency Vin = 12 V, IO = 0.6 A 82.8% L = Coilcraft M1496–A or General Magnetics Technology GMT–0223, 42 turns of #16 AWG on Magnetics Inc. 58350–A2 core. Heatsink = AAVID Engineering Inc. MC34166: 5903B, or 5930B MTP3055EL: 5925B Figure 21 shows that the MC34166 can be configured as a step–up/down converter with the addition of an external power MOSFET. Energy is stored in the inductor during the on–time of transistors Q1 and Q2. During the off–time, the energy is transferred, with respect to ground, to the output filter capacitor and load. This circuit configuration has two significant advantages over the basic step–up converter circuit. The first advantage is that output short–circuit protection is provided by the MC34166, since Q1 is directly in series with Vin and the load. Second, the output voltage can be programmed to be less than Vin. Notice that during the off–time, the inductor forward biases diodes D1 and D2, transferring its energy with respect to ground rather than with respect to Vin. When operating with Vin greater than 20 V, a gate protection network is required for the MOSFET. The network consists of components RG, D3, and D4. Figure 21. Step–Up/Down Converter (Top View) (Bottom View) 3.45″ Figure 22. Step–Up/Down Converter Printed Circuit Board and Component Layout Vin VO CF RF R1 +- + - + + D3 D2 RG |
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