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EL5623IRZ-T13 Datasheet(PDF) 6 Page - Intersil Corporation |
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EL5623IRZ-T13 Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 7 page 6 FN7507.1 May 6, 2005 Description of Operation and Application Information Product Description The EL5623 is fabricated using a high voltage CMOS process. It exhibits rail to rail input and output capability and has very low power consumption. When driving a load of 10K and 12pF, the buffers have a -3dB bandwidth of 10MHz and exhibit 9V/µs slew rate. Input, Output, and Supply Voltage Range The EL5623 is specified with a single nominal supply voltage from 5V to 15V or a split supply with its total range from 5V to 15V. Correct operation is guaranteed for a supply range from 4.5V to 16.5V. The input common-mode voltage range of the EL5623 is within 500mV beyond the supply rails. The output swings of the buffers typically extend to within 100mV of the positive and negative supply rails with load currents of 5mA. Decreasing load currents will extend the output voltage even closer to each supply rails. Output Phase Reversal The EL5623 is immune to phase reversal as long as the input voltage is limited from VS- -0.5V to VS+ +0.5V. Although the device's output will not change phase, the input's over-voltage should be avoided. If an input voltage exceeds supply voltage by more than 0.6V, electrostatic protection diode placed in the input stage of the device begin to conduct and over-voltage damage could occur. Output Drive Capability The EL5623 does not have internal short-circuit protection circuitry. The buffers will limit the short circuit current to ±120mA if the outputs are directly shorted to the positive or the negative supply. If the output is shorted indefinitely, the power dissipation could easily increase such that the part will be destroyed. Maximum reliability is maintained if the output continuous current never exceeds ±30mA, a limit is set by the design of the internal metal interconnections. The Unused Buffers It is recommended that any unused buffers should have their inputs tied to ground plane. Power Dissipation With the high-output drive capability of the EL5623, it is possible to exceed the 125°C “absolute-maximum junction temperature” under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if load conditions need to be modified for the buffer to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to: where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature θJA = Thermal resistance of the package PDMAX = Maximum power dissipation in the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the loads, or: when sourcing, and: when sinking. where: i = 1 to total number of buffers VS = Total supply voltage of buffer and VCOM ISMAX = Total quiescent current VOUTi = Maximum output voltage of the application ILOADi = Load current of buffer If we set the two PDMAX equations equal to each other, we can solve for the RLOAD's to avoid device overheat. The package power dissipation curves provide a convenient way to see if the device will overheat. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature. By using the previous equation, it is a simple matter to see if PDMAX exceeds the device's power derating curves. Power Supply Bypassing and Printed Circuit Board Layout As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible, and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to ground, one 0.1µF ceramic capacitor should be placed from the VS+ pin to ground. A 4.7µF tantalum capacitor should then be connected from the VS+ pin to ground. One 4.7µF capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. PDMAX TJMAX - TAMAX Θ JA --------------------------------------------- = PDMAX VS IS ΣiVS+ ( [ VOUTi) ILOADi] × – × + × = PDMAX VS IS ΣiV ( OUTi [ VS-) ILOADi] × – × + × = EL5623 |
Similar Part No. - EL5623IRZ-T13 |
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Similar Description - EL5623IRZ-T13 |
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