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HD64336902G Datasheet(PDF) 6 Page - Renesas Technology Corp |
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HD64336902G Datasheet(HTML) 6 Page - Renesas Technology Corp |
6 / 408 page Rev. 1.00, 11/03, page vi of xxviii Preface The H8/36912 Group and H8/36902 Group are single-chip microcomputers made up of the high- speed H8/300H CPU employing Renesas Technology original architecture as their cores, and the peripheral functions required to configure a system. The H8/300H CPU has an instruction set that is compatible with the H8/300 CPU. Target Users: This manual was written for users who will be using the H8/36912 Group and H8/36902 Group in the design of application systems. Target users are expected to understand the fundamentals of electrical circuits, logical circuits, and microcomputers. Objective: This manual was written to explain the hardware functions and electrical characteristics of the H8/36912 Group and H8/36902 Group to the target users. Refer to the H8/300H Series Programming Manual for a detailed description of the instruction set. Notes on reading this manual: • In order to understand the overall functions of the chip Read the manual according to the contents. This manual can be roughly categorized into parts on the CPU, system control functions, peripheral functions and electrical characteristics. • In order to understand the details of the CPU's functions Read the H8/300H Series Programming Manual. • In order to understand the details of a register when its name is known Read the index that is the final part of the manual to find the page number of the entry on the register. The addresses, bits, and initial values of the registers are summarized in section 19, List of Registers. Example: Bit order: The MSB is on the left and the LSB is on the right. Notes: When using an on-chip emulator (E7) for H8/36912, H8/36902 program development and debugging, the following restrictions must be noted. 1. The NMI pin is reserved for the E7, and cannot be used. 2. Area H’2000 to H’2FFF is used by the E7, and is not available to the user. 3. Area H’F980 to H’FD7F must on no account be accessed. 4. When the E7 is used, address breaks can be set as either available to the user or for use by the E7. If address breaks are set as being used by the E7, the address break control registers must not be accessed. 5. When the E7 is used, NMI is an input/output pin (open-drain in output mode). |
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