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EL4089CS Datasheet(PDF) 3 Page - Intersil Corporation |
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EL4089CS Datasheet(HTML) 3 Page - Intersil Corporation |
3 / 9 page 3 NOTES: 1. Test fixture was designed to minimize capacitance at the IN- input. A “good” fixture should have less than 2pF of stray capacitance to ground at this very sensitive pin. See application notes for further details. 2. SR measured at 20% to 80% of a 4VPK-PK square wave. 3. DC offset from -0.714V through +0.714V, ac amplitude is 286mVP-P, equivalent to 40 IRE. Closed-Loop AC Electrical Specifications Provisional Supplies at ±15V, Load = 150 Ω and 15pF. R F and RG = 300Ω; AV = 2, TA = 25°C. (Note 1) PARAMETER DESCRIPTION MIN TYP MAX UNITS AMPLIFIER SECTION SR Slew Rate (Note 2) 500 V/µs SR Slew Rate with ±5V Supplies (Note 2) 275 V/µs BW Bandwidth ±5V Supplies -3dB 60 MHz -3dB 55 MHz BW Bandwidth ±5V Supplies ±0.1dB 25 MHz ±0.1dB 23 MHz dG Differential Gain at 3.58MHz (Note 3) VS = ±15V 0.02 % VS = ±5V 0.03 % dPh Differential Phase at 3.58MHz (Note 3) VS = ±15V 0.05 ° VS = ±5V 0.06 ° RESTORE SECTION SR Restore Amplifier Slew Rate (Test Circuit) 20%--80% 25 V/µs THE Time to Enable Hold 25 ns THD Time to Disable Hold 40 ns EL4089 |
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