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FAN5632MPX Datasheet(PDF) 7 Page - Fairchild Semiconductor |
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FAN5632MPX Datasheet(HTML) 7 Page - Fairchild Semiconductor |
7 / 11 page 7 www.fairchildsemi.com FAN5631/FAN5632 Rev. 1.0.2 Block Diagram Figure 4. Block Diagram Detailed Description The FAN5631/FAN5632 switched capacitor DC/DC converter automatically configures switches to achieve high efficiency and provides a regulated output voltage by means of the Pulse Fre- quency Modulation (PFM) pulse-skipping mode. An internal soft-start circuit prevents excessive in-rush current drawn from the supply. The switches are split into three segments. Based on the values of VIN, VOUT and IOUT, an internal circuitry deter- mines the number of segments to be used to reduce current spikes. Step-Down Charge Pump Operation When VIN ≥ 2 × VOUT/0.9, a 2:1 configuration, as shown in Fig. 5, is enabled. The factor 0.9 is used instead of 1 in order to account for the effect of resistive losses across the switches and to accommodate hysteresis in the voltage detector comparator. Two phase non-overlapping clock signals are generated to drive four switches. When switches 1 and 3 are ON, switches 2 and 4 are OFF and CB is charged. When switches 2 and 4 are ON, switches 1 and 3 are OFF and charge is transferred from CB to COUT. When VIN < 2 × VOUT/0.9, a 1:1 configuration, as shown in Fig. 6 is enabled. In the 1:1 configuration switch 3 is always OFF and switch 4 is always ON. At the 1.6V output setting the configura- tion changes from 2:1 to 1:1 at VIN = 3.56V. At the 1.3V output setting the change occurs at VIN = 3.06V. Pulse-Skipping PFM and Fractional Switch Operation When the regulated output voltage reaches its upper limit, the switches are turned off and the output voltage reaches its lower limit. Considering a step-down 2:1 mode of operation, 1.6V out- put as an example, when the output reaches about 1.62V (upper limit), the control logic turns off all switches. Switching stops completely. This is pulse-skipping mode. Since the supply is isolated from the output, the output voltage will drop. Once the output drops to about 1.58V (lower limit), the device will return to regular switching mode with one quarter of each switch turning on first. Another quarter of each switch will be turned on if VOUT cannot reach regulation by the time of the third charge cycle. Full switch operation occurs only during startup or under heavy load condition, when a half switch operation cannot achieve regulation within seven charge cycles. Soft-Star t The soft-start feature limits in-rush current when the device is ini- tially powered up and enabled. The reference voltage is used to UVLO + - SHUTDOWN CONTROL LOGIC CONFIGURATION PULSE_SKIP SHORT_CKT. + - + - + - THERMAL SHUTDOWN IN OUT Vref. RAMP FB OUTPUT 150mV 1V 0.5* INPUT VOLTAGE REF. SOFT START Vref. RAMP OSCILLATOR (2MHz) C+ C- ENABLE VIN GND. D R I V E R S 0.25SW1 0.25SW1 0.25SW4 0.25SW4 0.5SW4 0.25SW3 0.25SW3 0.5SW3 0.5SW2 0.25SW2 0.25SW2 0.5SW1 FB VOUT |
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