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IDT70V9189 Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT70V9189 Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 17 page 6.42 IDT70V9189/79L High-Speed 64/32K x 9 Dual-Port Synchronous Pipelined Static RAM Industrial and Commercial Temperature Ranges 2 Index 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 1009998 9796 95 94 9392 91 90 89 888786 8584 83 82 81 8079 78 77 76 Vss FT/PIPER OER R/ WR CNTRSTR CE1R CE0R NC NC Vss A12R A13R A11R A10R A9R A8R A7R NC NC A14R NC NC 4860 drw 02 NC NC FT/PIPEL OEL R/ WL CNTRSTL CE1L CE0L NC NC NC VDD A14L A13L A8L A7L NC NC NC A12L A11L A10L A9L 70V9189/79PF PN100-1(5) 100-Pin TQFP Top View(6) A15R(1) NC NC A15L(1) NC , 01/15/04 Description: TheIDT70V9189/79isahigh-speed64/32Kx9bitsynchronousDual Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneousaccessofanyaddressfrombothports.Registersoncontrol, data,andaddressinputsprovideminimalsetupandholdtimes.Thetiming latitudeprovidedbythisapproachallowssystemstobedesignedwithvery shortcycletimes. Pin Configuration(2,3,4) NOTES: 1. A15X is a NC for IDT70V9179. 2. All Vcc pins must be connected to power supply. 3. All GND pins must be connected to ground. 4. Package body is approximately 14mm x 14mm x 1.4mm. 5. This package code is used to reference the package diagram. 6. This text does not indicate orientation of the actual part-marking. Withaninputdataregister,theIDT70V9189/79hasbeenoptimizedfor applicationshavingunidirectionalorbidirectionaldataflowinbursts.An automatic power down feature, controlled by CE0and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT’s CMOS high-performance technology, these devices typically operate on only 500mW of power. |
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