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MC74VHC1G126 Datasheet(PDF) 1 Page - ON Semiconductor |
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MC74VHC1G126 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2005 August, 2005 − Rev. 13 1 Publication Order Number: MC74VHC1G126/D MC74VHC1G126 Noninverting 3−State Buffer The MC74VHC1G126 is an advanced high speed CMOS noninverting 3−state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffered 3−state output which provides high noise immunity and stable output. The MC74VHC1G126 input structure provides protection when voltages up to 7.0 V are applied, regardless of the supply voltage. This allows the MC74VHC1G126 to be used to interface 5.0 V circuits to 3.0 V circuits. Features • High Speed: tPD = 3.5 ns (Typ) at VCC = 5.0 V • Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C • Power Down Protection Provided on Inputs • Balanced Propagation Delays • Pin and Function Compatible with Other Standard Logic Families • Chip Complexity: FETs = 58; Equivalent Gates = 15 • Pb−Free Packages are Available Figure 1. Pinout (Top View) VCC OE IN A OUT Y GND IN A OUT Y EN OE Figure 2. Logic Symbol 1 2 3 5 4 See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ORDERING INFORMATION FUNCTION TABLE L H X A Input Y Output L H Z OE Input H H L PIN ASSIGNMENT 1 2 3 GND OE IN A 4 5VCC OUT Y http://onsemi.com SC−88A/SOT−353/SC−70 DF SUFFIX CASE 419A TSOP−5/SOT−23/SC−59 DT SUFFIX CASE 483 MARKING DIAGRAMS 1 5 1 5 1 5 W2 AYW G G W2 M G W2 = Device Code M = Date Code* A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location. 1 5 G |
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