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EL2171CN Datasheet(PDF) 9 Page - Intersil Corporation |
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EL2171CN Datasheet(HTML) 9 Page - Intersil Corporation |
9 / 11 page 9 Capacitive Feedback The EL2071/EL2171 rely on their feedback resistor for proper compensation. A reduction of the impedance of the feedback element results in less stability, eventually resulting in oscillation. Therefore, circuit implementations which have capacitive feedback should not be used because of the capacitor's impedance reduction with frequency. Similarly, oscillations can occur when using the technique of placing a capacitor in parallel with the feedback resistor to compensate for shunt capacitances from the inverting input to ground. Printed Circuit Layout As with any high frequency device, good PCB layout is necessary for optimum performance. Ground plane construction is a requirement, as is good power-supply bypassing close to the package. The inverting input is sensitive to stray capacitance, therefore connections at the inverting input should be minimal, close to the package, and constructed with as little coupling to the ground plane as possible. Capacitance at the output node will reduce stability, eventually resulting in peaking, and finally oscillation if the capacitance is large enough. The design of the EL2071/EL2171 allow a larger capacitive load than comparable products, yet there are occasions when a series resistor before the capacitance may be needed. Please refer to the graphs to determine the proper resistor value needed. Disable/Enable Operation for EL2071 The EL2071 has a disable/enable control input at pin 8. The device is enabled and operates normally when pin 8 is left open or returned to ground. When the voltage at pin 8 is brought to within 0.4V of pin 7 (VS+), the EL2071 is disabled. The output becomes a high impedance, the inverting input is no longer driven to the positive input voltage, and the supply current is reduced to less than 2.2.mA. There are internal resistors which limit the current at pin 8 to a safe level (~ ±500µA) if pin 8 is shorted to either supply. Typically, analog and digital circuits should have separate power supplies. This usually leads to slight differences between the power supply voltages. The EL2071's disable feature is dependent on the voltage at pins 8 and 7. Therefore, to operate the disable feature of the EL2071 dependably over temperature, it is recommended that the logic circuitry which drives pin 8 of the EL2071 operate from the same +5V supply as the EL2071 to avoid voltage differences between the digital and analog power supplies. Since VDIS is temperature dependent, it is recommended that 5V CMOS logic (with a VOH > 4.6V sourcing > 750µA over temperature) be used to drive the disable pin of the EL2071. When disabled, (as well as in enabled mode), care must be taken to prevent a differential voltage between the + and - inputs greater than 5.0V. For example, in the figure below, the EL2071 is connected in a gain of +7 configuration and is disabled while the analog bus is driven externally to +5V. Pin 2 is consequently at +0.71V, and if VIN is driven to -5V, then 5.71V appears between pins 3 and 2. Internally, this voltage appears across a forward biased VBE in series with a reverse biased VBE and is past the threshold for zenering the reverse biased VBE. In a typical application, a 50Ω or 75 Ω terminating resistor from pin 3 to ground will prevent pin 3 from approaching -5V. Using the EL2071 as a Multiplexer An interesting use of the enable feature is to combine several amplifiers in parallel with their outputs in common. This combination then acts similar to a MUX in front of an amplifier. A typical circuit is shown. The series resistance at each output helps to further increase isolation between amplifiers. When the EL2071 is disabled, the DC output impedance is >100k Ω in parallel with 2pF capacitance. To operate properly, the decoder that is used must have a VOH > (VS+) - 0.4V with IOH = 750µA, and should be connected to the same power supply as the EL2071. EL2071, EL2171 |
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