MITSUBISHI LSIs

2097152-BIT (262144-WORD BY 8-BIT) CMOS STATIC RAM

MITSUBISHI

ELECTRIC

-70LL, -85LL, -10LL, -12LL

'97.3.21

6

(Note 3)

(Note 3)

(Note 5)

(Note 3)

(Note 3)

(Note 4)

(Note 5)

(Note 3)

(Note 3)

(Note 4)

(Note 3)

(Note 3)

DATA IN

STABLE

DATA IN

STABLE

W

W

Note 3: Hatching indicates the state is "don't care".

5: When the falling edge of W is simultaneously or prior to the falling edge of S1

6: Don't apply inverted phase signal externally when DQ pin is output mode.

4: Writing is executed while S2 high overlaps S1 and W low.

or rising edge of S2, the outputs are maintained in the high impedance state.