SI91872DMP-28-E3 datasheet(3/9 Pages) VISHAY

Part #	SI91872DMP-28-E3

Description	300-mA Low-Noise LDO Regulator With Error Flag and Discharge Option

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Manufacturer	VISHAY [Vishay Siliconix]

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Si91872

Vishay Siliconix

Document Number: 72013

S-51147—Rev. F, 20-Jun-05

www.vishay.com

3

SPECIFICATIONS

Limits

−40 to 85_C

Tempa

Test Conditions Unless Specified

TA = 25_C, VIN = VOUT(nom) + 1 V, IOUT = 1 mA,

CIN = 2 mF, COUT = 2.0 mF, VSD = 1.5 V

Parameter

Unit

Maxb

Typc

Minb

Tempa

Test Conditions Unless Specified

TA = 25_C, VIN = VOUT(nom) + 1 V, IOUT = 1 mA,

CIN = 2 mF, COUT = 2.0 mF, VSD = 1.5 V

Symbol

f = 1 kHz

Room

60

Ripple Rejection

DVOUT/DVIN

IOUT = 300 mA

f = 10 kHz

Room

40

dB

pp

j

OUT

IN

OUT

f = 100 kHz

Room

30

Dynamic Line Regulation

DVO(line)

VIN : VOUT(nom) + 1 V to VOUT(nom) + 2 V

tr/tf = 2 ms, IOUT = 300 mA

Room

20

mV

Dynamic Load Regulation

DVO(load)

IOUT : 1 mA to 300 mA, tr/tf = 2 ms

Room

25

mV

Thermal Shutdown Junction

Temperature

TJ(S/D)

Room

150

_C

Thermal Hysteresis

THYST

Room

20

C

Reverse current

IR

VIN = −6.0 V

Room

1

mA

Short Circuit Current

ISC

VOUT = 0 V

Room

700

mA

Shutdown

Shutdown Supply Current

ICC(off)

VSD = 0 V

Room

0.1

1

mA

SD Pin Input Voltage

VSD

High = Regulator ON (Rising)

Full

1.5

VIN

V

SD Pin Input Voltage

VSD

Low = Regulator OFF (Falling)

Full

0.4

V

Auto Discharge Resistance

R_DIS

Si91872 Only

Room

100

W

SD Pin Input Currentf

IIN(SD)

VSD = 1.5 V, VIN = 6 V

Room

0.7

mA

SD Hysteresis

VHYST(SD)

Full

150

mV

VOUT Turn-On Time

tON

VSD (See Figure 1), ILOAD = 100 mA

Room

50

ms

ERROR Output

ERROR High Leakage

IOFF

ERROR v VIN. VOUT in Regulation

Full

1

mA

ERROR Low Voltage

VOL

ISINK = 0.5 mA

Full

0.4

V

ERROR Voltage Threshold

VERROR

VOUT Below VOUT(nom)g, VIN w 2 V

VOUT Falling, IOUT = 1 mA, VOUT(nom) w 2 V

Full

−2

−4

−6

ERROR Voltage Threshold

VERROR

VOUT(nom)g t 2 V, VIN u 2 V

Full

−4

%

ERROR Voltage Threshold

Hysteresis

VHYST(ERROR)

Room

1.5

%

Notes

a.

Room = 25_C, Full = −40 to 85_C.

b.

The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.

c.

Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.

d.

Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V

differential, provided that VIN does not not drop below 2.0 V.

e.

Ground current is specified for normal operation as well as “drop-out” operation.

f.

The device’s shutdown pin includes a typical 2-MW internal pull-down resistor connected to ground.

g.

VOUT(nom) is VOUT when measured with a 1-V differential to VIN.

TIMING WAVEFORMS

FIGURE 1. Timing Diagram for Power-Up

VSD

0.95 VNOM

VOUT

VNOM

tON

0 V

VIN

tr v 1 mS

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