0.8A STEP-DOWN/STEP-UP/INVERTING DC-DC CONVERTER
AZ34063
Data Sheet
5
Apr. 2005 Rev. 2. 1
BCD Semiconductor Manufacturing Limited
(
VCC = 5.0 V, TA = -40 to 85
oC, unless otherwise specified.)
Note 3: Low duty cycle pulse technique are used during test to maintain junction temperature as close to ambient temperature
as possible.
Note 4: If the output switch is driven into hard saturation (non-Darlington configuration) at low switch currents ( 300mA)
and high driver currents ( 30mA), it may take up to 2.0us for it to come out of saturation. This condition will shorten the off
time at frequencies 30KHz, and is magnified at high temperatures. This condition does not occur with a Darlington configura-
tion, since the output switch cannot saturate. If a non-Darlington configuration is used, the following output drive condition is
recommended:
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
OSCILLATOR
Frequency
fOSC
VPin 5 = 0 V,
TA = 25
oC
CT = 1.0 nF
24
33
42
KHz
CT = 330 pF
50
65
80
KHz
Charge Current
ICHG
VCC = 5.0 V to 36 V, TA = 25
oC
24
35
42
A
Discharge Current
IDISCHG
VCC = 5.0 V to 36 V, TA = 25
oC
140
220
260
A
Discharge to Charge
Current Ratio
IDISCHG/ICHG Pin 7 to V
CC, TA = 25
oC
5.2
6.5
7.5
Current Limit Sense
VIPK(sense)
ICHG = IDISCHG, TA = 25
oC
250
300
350
mV
OUTPUT SWITCH (Note 3)
Saturation Voltage,
Dalington Connection
VCE(sat)
ISW = 0.6 A,
Pins 1, 8 connected
1.0
1.3
V
Saturation Voltage (Note 4)
VCE(sat)
ISW = 0.6 A, RPin 8 = 82
to
VCC, Forced = 20
0.45
0.8
V
DC Current Gain
hFE
ISW = 0.6 A,
VCE = 5.0 V,
50
75
Collector Off-State Current
IC(off)
VCE = 36 V
0.01
100
A
COMPARATOR
Threshold Voltage
VTH
TA = 25
oC
1.225
1.250
1.275
V
TA = -40 to 85
oC
1.21
1.29
Threshold Voltage Line
Regulation
REGLINE
VCC = 3.0 V to 36 V
1.4
5
mV
Input Bias Current
IIB
VIN = 0 V
-20
-400
nA
TOTAL DEVICE
Supply Current
ICC
VCC = 5.0 V to 36 V, CT = 1.0 nF,
Pin 7 = VCC, VPin 5 > VTH,
Pin 2 = GND, other pins open
4mA
Electrical Characteristics
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