MITSUBISHI LSIs

M5M5Y5672TG – 25,22,20

18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM

10

MITSUBISHI

ELECTRIC

Advanced Information

M5M5Y5672TG REV.0.1

It should be noted that deselection of the SRAM via E2 and E3 also deselects the Echo Clock output drivers. The deselection of

Echo Clock drivers is always pipelined to the same degree as output data. Deselection of the SRAM via E1# does not deactivate the

Echo Clocks.

CLK

A

ADD

E1#

E2# Bank1

Q(A)

Q(C)

E2 Bank2

B

C

D

E

F

DQ

Bank1

CQ

Bank1

CQ Bank1

+ CQ Bank2

Q(B)

Q(D)

DQ

Bank2

CQ

Bank2

Echo Clock Control in Two Banks

Note9. E1# does not deselect the Echo Clock Outputs. Echo Clock outputs are synchronously

deselected by E2 or E3 being sampled false.