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USB1101L10X Datasheet(PDF) 2 Page - Fairchild Semiconductor

Part # USB1101L10X
Description  USB 2.0 FS Peripheral Transceiver
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

USB1101L10X Datasheet(HTML) 2 Page - Fairchild Semiconductor

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Preliminary
www.fairchildsemi.com
2
Pin Description
Note 1: OE
H
Note 2: OE
L
Functional Description
The USB1101 transceiver is designed as an Upstream fac-
ing port device to convert CMOS data into USB differential
bus signal levels and to convert USB differential bus signal
to CMOS data. If you wish to use these as downstream
devices, Config must be hard-wired to GND.
To minimize EMI and noise the outputs are edge rate con-
trolled with the rise and fall times controlled and defined for
full speed data rates only (12Mbits/s). The rise and fall
times are balanced between the differential pins to mini-
mize skew.
The USB1101 supports the DAT_VP/SE0_VM format from
the OTG Transceiver Specification using the DAT_SE0
Mode. Table 1 describes the specific pin functionality selec-
tion and Table 2 describes the specific Truth Tables for
Driver, Receiver, and Suspended operating functions.
The USB1101 has the capability of serving Self Powered
power supply configurations only but interfaces to mixed
voltage supply applications.
TABLE 1. Function Select
Note 3: Signal levels is function of connection, Config and/or pull-up/pull-down resistors.
Note 4: For Suspnd
HIGH mode the differential receiver is inactive.
Pin Number
Pin Name
I/O
Pin Description
1
Config
I
USB connect or disconnect software control input. Configures 3.3V to
internal 1.5k
: resistor on D when HIGH. If device is used as Downstream
port then this pin is hard-wired to GND.
2OE
I
Output Enable (active LOW)
When OE
L transmit mode is enabled
When OE
H receive mode (CMOS level is relative to VCCIO) is enabled.
3
DAT_VP
I/O
When in transmit mode(Note 2) DAT_VP is a single-ended host data input
(CMOS level relative to VCCIO).
When in receive mode(Note 1) and Suspnd
L DAT_VP is a single ended
data output comprised of the differential input data from the D
/D inputs
(see Table 2);
When in receive mode(Note 1) with Suspnd
H DAT_VP outputs the D

data.
(see Table 1 and Table 2) Output drive is 2mA (min) buffer
4
SE0_VM
I/O
When in transmit mode(Note 2) SE0_VM is a data input (CMOS level rela-
tive to VCCIO).
When in receive mode(Note 1) and Suspnd
L, SE0_VM is used as an out-
put (see Table 2)
(see Table 1 and Table 2). Output drive is 4ma (min) buffer
5
GND
GND
GND
6
Suspnd
I
Enables a low power state (CMOS level is relative to VCCIO).
In receive mode(Note 1) with Suspnd
L the DAT_VP pin will be a function
of the D
/D lines.
In receive mode(Note 1) with Suspnd
H DAT_VP will have the value of D

such that the device can still monitor out-of-suspend signaling.
7, 8
D
, D
AI/O
Data
, Data. Differential data bus conforming to the USB standard
9VCCIO
Pwr
Supply Voltage for host side digital I/O pins (1.65V to 3.6V)
10
VCC
Pwr
Supply Voltage Input (3.0V to 3.6V)
Suspnd
OE
D
, D
DAT_VP
SE0_VM
Function
L
L
Transmitting
Host Data Input
SE0_VM Host Input
Normal Driving
L
H
Receiving (Note 3)
D
, D Diff Output
SE0_VM Output
Receiving
H
L
Transmitting (Note 4)
Host Data Input
SE0_VM Host Input
Driving while Suspended
H
H
Driver is 3-STATE
(Note 4)
DAT_VP Output
SE0_VM Output
Suspended
(Internal Low Power Mode)


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