NBLVEP16VRMN datasheet(7/14 Pages) ONSEMI

Part #	NBLVEP16VRMN

Description	2.5V/3.3V/5V ECL Differential Receiver/Driver with Oscillator Gain Stage and Enabled High Gain Outputs

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Manufacturer	ONSEMI [ON Semiconductor]

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NBLVEP16VR

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DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 11)

−40

°C

25

°C

85

°C

Symbol

Characteristic

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

IEE

Negative Power Supply Current (Note 12)

30

41

48

30

43

48

35

45

54

mA

VOH

Output High Voltage (Note 13)

3840

4170

3840

4170

3840

4170

mV

VOL

Output Low Voltage (Note 13)

3120

3450

3120

3450

3120

3450

mV

VIH

Input High Voltage (Single−Ended)

(D, D, EN) (Note 14)

3775

4120

3775

4120

3775

4120

mV

VIL

Input Low Voltage (Single−Ended)

(D, D, EN) (Note 14)

3055

3375

3055

3375

3055

3375

mV

VBB

Output Voltage Reference

3490

3600

3730

3490

3600

3730

3490

3600

3730

mV

VIHCMR

Input High Voltage Common Mode Range

(Differential Configuration)

2.0

5.0

2.0

5.0

2.0

5.0

V

IIH

Input HIGH Current (Note 14)

EN

150

mA

IIL

Input LOW Current (Note 14)

EN

0.5

mA

NOTE:

LVEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been

established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is

maintained.

11. Input and output parameters vary 1:1 with VCC.

12. VEEP and CS_SEL open.

13. QHG/QHG outputs loaded with 50

W to VCC − 2.0 V (VEEP = OPEN) Figure 11 or with optional current source (VEEP = VEE) Figure 12.

Q/Q outputs loaded with 8 mA current source (CS_SEL = VEE).

14. EN_SEL Open.

DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5V to −2.375 V (Note 15)

−40

°C

25

°C

85

°C

Symbol

Characteristic

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

IEE

Negative Power Supply Current

(Note 16)

30

38

48

30

40

48

35

42

54

mA

VOH

Output High Voltage (Note 17)

−1160

−830

−1160

−830

−1160

−830

mV

VOL

Output Low Voltage (Note 17)

−1880

−1550

−1880

−1550

−1880

−1550

mV

VIH

Input High Voltage (Single−Ended)

(D, D, EN) (Notes 18, 19)

−3.3 V

VBB_ADJ = OPEN

−2.5 V

VBB_ADJ = VCC

−1225

−845

−880

−500

−1225

−845

−880

−500

−1225

−845

−880

−500

mV

VIL

Input Low Voltage (Single−Ended)

(D, D, EN) (Notes 18, 19)

−3.3 V

VBB_ADJ = OPEN

−2.5 V

VBB_ADJ = VCC

−1945

−1450

−1625

−1105

−1945

−1450

−1625

−1105

−1945

−1450

−1625

−1105

mV

VBB

Output Voltage Reference

−3.3 V or −5.2 V

VBB_ADJ = OPEN

−2.5 V (Note 19)

VBB_ADJ = VCC

−1510

−1080

−1400

−975

−1270

−870

−1510

−1080

−1400

−975

−1270

−870

−1510

−1080

−1400

−975

−1270

−870

mV

VIHCMR

Input High Voltage Common Mode

Range (Differential Configuration)

VEE v −5 V

VEE+1.2

VEE+2.0

0

VEE+1.2

VEE+2.0

0

VEE+1.2

VEE+2.0

0

V

IIH

Input HIGH Current (Note 18)

EN

150

mA

IIL

Input LOW Current (Note 18)

EN

0.5

mA

NOTE:

LVEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been

established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is

maintained.

15. Input and output parameters vary 1:1 with VCC.

16. VEEP and CS_SEL open.

17. QHG/QHG outputs loaded with 50

W to VCC − 2.0 V (VEEP = OPEN) Figure 11 or with optional current source (VEEP = VEE) Figure 12.

Q/Q outputs loaded with 8 mA current source (CS_SEL = VEE).

18. EN_SEL Open.

19. VBB_ADJ tied to VCC for −2.5 V single−ended operation.

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