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HI3-7152J-5 Datasheet(PDF) 4 Page - Intersil Corporation |
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HI3-7152J-5 Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 16 page 6-4 Absolute Maximum Ratings (Note 1) Thermal Information Supply Voltage V+ to Gnd (DG/AG/GND) . . . . . . . . . . . . . . . . -0.3V < V+ < +5.7V V- to Gnd (DG/AG/GND). . . . . . . . . . . . . . . . . .-5.7V < V- < +0.3V Analog Input Pins . . . . . . . . . . . . . . . . . V- -0.3V < VINA < V+ +0.3V Digital I/O Pins . . . . . . . . . . . . . . . . . . .DG - 0.3V < VI/O < V+ +0.3V Power Dissipation (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . <500mW Derate above 75oC at -10mW/C Operating Conditions Temperature Range HI3-7152X-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 75oC HI3-7152X-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC Thermal Resistance (Typical) θJA (oC/W) θJC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . TBD N/A CERDIP Package . . . . . . . . . . . . . . . . TBD TBD Maximum Junction Temperature (Hermetic Package or Die) . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . . 300oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Input voltages may exceed the supply voltage provided the inputs current is limited to ±1mA. 2. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board. Accuracy Electrical Specifications V+ = +5V, V- = -5V, VREF = 2.50V, fCLK = 600kHz, 50% Duty Cycle, Unless Otherwise Specified (Note 4) PARAMETER SYMBOL (NOTE 3) TEMP. (oC) J, A GRADE K, B GRADE UNITS MIN TYP MAX MIN TYP MAX Resolution (Note 5) (With no missing codes) RES TA = 25oC 10- - 10- - Bits TMIN to TMAX 10 - - 10 - - Bits Integral Linearity Error ILE TA = 25oC- ±0.5 ±1.0 - ±0.3 ±0.5 LSB TMIN to TMAX - ±0.75 ±1.0 - ±0.5 ±0.75 LSB Differential Linearity Error DLE TA = 25oC- - ±1.0 - - ±0.5 LSB TMIN to TMAX -- ±1.0 - - ±0.75 LSB Bipolar Offset Error VOS TA = 25oC- ±1.0 ±2.5 - ±0.6 ±1.5 LSB TMIN to TMAX - ±1.5 ±3.0 - ±1.0 ±2.0 LSB Unadjusted Gain Error eG+ and eG- TA = 25oC- ±1.0 ±2.5 - ±0.6 ±1.5 LSB TMIN to TMAX - ±1.5 ±3.0 - ±1.0 ±2.0 LSB NOTES: 3. See Ordering Information Table. 4. FSR (Full Scale Range) = 2 X VREF (5V at VREF = 2.5V). LSB (Least Significant Bit) = FSR/1024 (4.88mV at VREF = 2.5V). DC Electrical Specifications V+ = 5V, V- = -5V, VREF = 2.50V, TA = 25oC, fCLK = 600kHz, 50% Duty Cycle, Unless Otherwise Specified PARAMETER SYMBOL (NOTE 5) TEST CONDITION 25oC0oC to 75oC-40oC to 85oC UNITS MIN TYP MAX MIN MAX MIN MAX ANALOG INPUT Analog Input Range VIR VIN = 0V -VREF -VREF -VREF VREF -VREF VREF V Analog INput Bias Current IBI - 0.01 100 - 100 - 100 nA Analog Input Capacitance (Note 6) CVIN -8 20 - - - - pF REFERENCE INPUT Reference Input Range (Note 7) VRR VREF = 2.50V 2.2 2.5 2.6 2.2 2.6 2.2 2.6 V Reference Input Bias Current IBR - 0.01 100 - 100 - 100 nA Reference Input Capacitance (Note 6) CVR -7 20 - - - - pF HI-7152 |
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