 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
LCL71C03ACPL Datasheet(PDF) 11 Page - Intersil Corporation |
|
||||||||||||||||||||||||||||||
LCL71C03ACPL Datasheet(HTML) 11 Page - Intersil Corporation |
|
|
11 / 23 page  11 Reference Voltage The analog input required to generate a full scale output is: VIN =2VREF. The stability of the reference voltage is a major factor in the overall absolute accuracy of the converter. For this reason, it is recommended that an external high quality reference be used where ambient temperature is not controlled or where high-accuracy absolute measurements are being made. Buffer Gain At the end of the auto-zero interval, the instantaneous noise voltage on the auto-zero capacitor is stored and subtracted from the input voltage while adding to the reference voltage during the next cycle. The result of this is that the noise voltage is effectively somewhat greater than the input noise voltage of the buffer itself during integration. By introducing some voltage gain into the buffer, the effect of the auto-zero noise (referred to the input) can be reduced to the level of the inherent buffer noise. This generally occurs with a buffer gain of between 3 and 10. Further increase in buffer gain merely increases the total offset to be handled by the auto- zero loop, and reduces the available buffer and integrator swings, without improving the noise performance of the system. The circuit recommended for doing this with the ICL8068A/ICL71C03 is shown in Figure 6. ICL8052A vs ICL8068A The ICL8052A offers significantly lower input leakage currents than the ICL8068A, and may be found preferable in systems with high input impedances. However, the ICL8068A has substantially lower noise voltage, and is the device of choice for systems where noise is a limiting factor, particularly in low signal level conditions. Max Clock Frequency The maximum conversion rate of most dual-slope A/D converters is limited by frequency response of the comparator. The comparator in this circuit is no exception, even though it is entirely NPN with an open-loop, gain- bandwidth product of 300MHz. The comparator output follows the integrator ramp with a 3 µs delay, and at a clock frequency of 160kHz (6 µs period) half of the first reference integrate clock period is lost in delay. This means that the meter reading will change from 0 to 1 with 50 µV input, 1 to 2 with 150 µV, 2to3at 250µV, etc. This transition at midpoint is considered desirable by most users. However, if the clock frequency is increased appreciably above 160kHz, the instrument will flash “1” on noise peaks even when the input is shorted. For many dedicated applications where the input signal is always on one polarity, the dealy of the comparator need not be limitation. Since the non-linearity and noise do not increase substantially with frequency, clock rates of up to approximately 1MHz may be used. For a fixed clock frequency, the extra count or counts caused by comparator delay will be a constant and can be subtracted out digitally. The minimum clock frequency is established by leakage on the auto-zero and reference caps. With most devices, measurement cycles as long as 10 seconds give no measurable leakage error. To achieve maximum rejection of 60Hz pickup, the signal integrate cycle should be a multiple of 60Hz. Oscillator frequencies of 300kHz, 200kHz, 150kHz, 120kHz, 100kHz, 40kHz, 331/3kHz, etc, should be selected. For 50Hz rejection, oscillator frequencies of 250kHz, 1662/3kHz, 125kHz, 100kHz, etc. would be suitable. Note that 100kHz (2.5 readings/second) will reject both 50Hz and 60Hz. The clock used should be free from significant phase or frequency jitter. A simple two-gate oscillator and one based on CMOS 7555 timer are shown in the Applications section. The multiplexed output means that if the display takes significant current from the logic supply, the clock should have good PSRR. FIGURE 6. ADDING BUFFER GAIN TO ICL8068A A2 + - A3 + - INTEG. COMP. A1 + - BUFFER 14 11 9 INT OUT -INT IN BUF OUT 10 -BUF IN -1.2V 2 -15V 1 -15V 7 8 +15V 12 +INT IN 13 ICL8068A INT. REF. 6 3 +BUF IN 5 REF OUT 10k Ω 1k Ω 300pF COMP OUT 100k Ω 10-50K TO ICL7104 ICL8052A/ICL71C03, ICL8068A/ICL71C03 |
Similar Part No. - LCL71C03ACPL |
|
Similar Description - LCL71C03ACPL |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
