M45PE40-VMW6TP datasheet(7/35 Pages) STMICROELECTRONICS

Part #	M45PE40-VMW6TP

Description	4 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 33 MHz SPI Bus Interface

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M45PE40

OPERATING FEATURES

Sharing the Overhead of Modifying Data

To write or program one (or more) data bytes, two

instructions are required: Write Enable (WREN),

which is one byte, and a Page Write (PW) or Page

Program (PP) sequence, which consists of four

bytes plus data. This is followed by the internal cy-

cle (of duration tPW or tPP).

To share this overhead, the Page Write (PW) or

Page Program (PP) instruction allows up to 256

bytes to be programmed (changing bits from 1 to

0) or written (changing bits to 0 or 1) at a time, pro-

vided that they lie in consecutive addresses on the

same page of memory.

An Easy Way to Modify Data

The Page Write (PW) instruction provides a con-

venient way of modifying data (up to 256 contigu-

ous bytes at a time), and simply requires the start

address, and the new data in the instruction se-

quence.

The Page Write (PW) instruction is entered by

driving Chip Select (S) Low, and then transmitting

the instruction byte, three address bytes (A23-A0)

and at least one data byte, and then driving Chip

Select (S) High. While Chip Select (S) is being

held Low, the data bytes are written to the data

buffer, starting at the address given in the third ad-

dress byte (A7-A0). When Chip Select (S) is driven

High, the Write cycle starts. The remaining, un-

changed, bytes of the data buffer are automatically

loaded with the values of the corresponding bytes

of the addressed memory page. The addressed

memory page then automatically put into an Erase

cycle. Finally, the addressed memory page is pro-

grammed with the contents of the data buffer.

All of this buffer management is handled internally,

and is transparent to the user. The user is given

the facility of being able to alter the contents of the

memory on a byte-by-byte basis.

For optimized timings, it is recommended to use

the Page Write (PW) instruction to write all con-

secutive targeted Bytes in a single sequence ver-

sus using several Page Write (PW) sequences

with each containing only a few Bytes (see Page

Write (PW) and AC Characteristics (33MHz oper-

ation)).

A Fast Way to Modify Data

The Page Program (PP) instruction provides a fast

way of modifying data (up to 256 contiguous bytes

at a time), provided that it only involves resetting

bits to 0 that had previously been set to 1.

This might be:

–

when the designer is programming the device

for the first time

–

when the designer knows that the page has

already been erased by an earlier Page Erase

(PE) or Sector Erase (SE) instruction. This is

useful, for example, when storing a fast

stream of data, having first performed the

erase cycle when time was available

–

when the designer knows that the only

changes involve resetting bits to 0 that are still

set to 1. When this method is possible, it has

the additional advantage of minimising the

number of unnecessary erase operations, and

the extra stress incurred by each page.

For optimized timings, it is recommended to use

the Page Program (PP) instruction to program all

consecutive targeted Bytes in a single sequence

versus using several Page Program (PP) se-

quences with each containing only a few Bytes

(see Page Program (PP) and AC Characteristics

(33MHz operation)).

Polling During a Write, Program or Erase Cycle

A further improvement in the write, program or

erase time can be achieved by not waiting for the

worst case delay (tPW, tPP, tPE, or tSE). The Write

In Progress (WIP) bit is provided in the Status

Register so that the application program can mon-

itor its value, polling it to establish when the previ-

ous cycle is complete.

Reset

An internal Power On Reset circuit helps protect

against inadvertent data writes. Addition protec-

tion is provided by driving Reset (Reset) Low dur-

ing the Power-on process, and only driving it High

when VCC has reached the correct voltage level,

VCC(min).

Active Power, Standby Power and Deep

Power-Down Modes

When Chip Select (S) is Low, the device is select-

ed, and in the Active Power mode.

When Chip Select (S) is High, the device is dese-

lected, but could remain in the Active Power mode

until all internal cycles have completed (Program,

Erase, Write). The device then goes in to the

Standby Power mode. The device consumption

drops to ICC1.

The Deep Power-down mode is entered when the

specific instruction (the Deep Power-down (DP) in-

struction) is executed. The device consumption

drops further to ICC2. The device remains in this

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M45PE40-VMW6TP Datasheet(PDF) 7 Page - STMicroelectronics

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