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SST39VF800-90-4I-BK Datasheet(PDF) 10 Page - Silicon Storage Technology, Inc |
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SST39VF800-90-4I-BK Datasheet(HTML) 10 Page - Silicon Storage Technology, Inc |
10 / 23 page 10 © 1999 Silicon Storage Technology, Inc. 343-04 2/99 8 Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information TABLE 13: PROGRAM/ERASE CYCLE TIMING PARAMETERS Symbol Parameter Min Max Units TBP Word Program time 20 µs TAS Address Setup Time 0 ns TAH Address Hold Time 30 ns TCS WE# and CE# Setup Time 0 ns TCH WE# and CE# Hold Time 0 ns TOES OE# High Setup Time 0 ns TOEH OE# High Hold Time 10 ns TCP CE# Pulse Width 40 ns TWP WE# Pulse Width 40 ns TWPH (1) WE# Pulse Width High 30 ns TCPH (1) CE# Pulse Width High 30 ns TDS Data Setup Time 30 ns TDH (1) Data Hold Time 0 ns TIDA (1) Software ID Access and Exit Time 150 ns TSE Sector Erase 25 ms TBE Block Erase 25 ms TSCE Chip Erase 100 ms Note 1: This parameter is measured only for initial qualification and after the design or process change that could affect this parameter. 343 PGM T14.1 AC CHARACTERISTICS TABLE 12: SST39VF800Q/VF800 READ CYCLE TIMING PARAMETERS VDD = 2.7-3.6V SST39VF800Q/VF800-70 SST39VF800Q/VF800-90 Symbol Parameter Min Max Min Max Units TRC Read Cycle time 70 90 ns TCE Chip Enable Access Time 70 90 ns TAA Address Access Time 70 90 ns TOE Output Enable Access Time 30 40 ns TCLZ(1) CE# Low to Active Output 0 0 ns TOLZ(1) OE# Low to Active Output 0 0 ns TCHZ(1) CE# High to High-Z Output 20 30 ns TOHZ(1) OE# High to High-Z Output 20 30 ns TOH(1) Output Hold from Address Change 0 0 ns 343 PGM T13.0 |
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