2 / 16 page
G -LINK
GLT44108
512K X 8 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Preliminary Aug 1999 (Rev.2.1)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No.24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 2 -
HIGH PERFORMANCE
-40
-50
-60
Max. RAS Access Time, (tRAC)
40 ns
50 ns
60 ns
Max. Column Address Access Time, (tAA)
20 ns
25 ns
30 ns
Min. Fast Page Mode Cycle Time, (tPC)
22 ns
31 ns
40 ns
Min. Read/Write Cycle Time, (tRC)
75 ns
90 ns
110 ns
Max. CAS Access Time (tCAC)
12 ns
13 ns
15 ns
Pin Descriptions:
Name
Function
A0 – A9
Address Inputs
RAS
Row Address Strobe
CAS
Column Address Strobe
WE
Write Enable
OE
Output Enable
DQ0 - DQ7
Data Inputs / Outputs
VCC
+5V Power Supply
VSS
Ground
Block Diagram:
1024
OE CLOCK
GENERATOR
W E CLOCK
GENERATOR
CAS CLOCK
GENERATOR
RAS CLOCK
GENERATOR
Data I/ O BUS
COLUMN DECODERS
SENSE AMPLIFIERS
I/ O
BUFFER
MEMORY
ARRAY
REFRESH
COUNTER
.
.
X 0 - x 9
512×8
Y 0 - Y 8
9
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
OE
WE
RAS
CAS
V CC
V SS
A 0
A 1
A 8
A 9
ADDRESS BUFFERS
AND PREDECODERS
ROW
DECODERS