Specifications ispLSI 2128V

10

Pin Description

Input/Output Pins - These are the general purpose I/O pins used by

the logic array.

NAME

Table 2-0002B/2128V

84-PIN PLCC

PIN NUMBERS

DESCRIPTION

17,

22,

27,

32,

40,

45,

49,

55,

67,

72,

77,

82,

90,

95,

99,

5,

18,

23,

28,

33,

41,

46,

51,

56,

68,

73,

78,

83,

91,

96,

1,

6,

19,

24,

29,

34,

42,

47,

52,

57,

69,

74,

79,

84,

92,

97,

2,

7,

I/O 0 - I/O 3

I/O 4 - I/O 7

I/O 8 - I/O 11

I/O 12 - I/O 15

I/O 16 - I/O 19

I/O 20 - I/O 23

I/O 24 - I/O 27

I/O 28 - I/O 31

I/O 32 - I/O 35

I/O 36 - I/O 39

I/O 40 - I/O 43

I/O 44 - I/O 47

I/O 48 - I/O 51

I/O 52 - I/O 55

I/O 56 - I/O 59

I/O 60 - I/O 63

20,

26,

30,

35,

43,

48,

53,

58,

70,

76,

80,

85,

93,

98,

3,

8

100-PIN TQFP

PIN NUMBERS

26,

30,

34,

38,

45,

49,

53,

57,

68,

72,

76,

80,

3,

7,

11,

15,

27,

31,

35,

39,

46,

50,

54,

58,

69,

73,

77,

81,

4,

8,

12,

16,

28,

32,

36,

40,

47,

51,

55,

59,

70,

74,

78,

82,

5,

9,

13,

17,

29,

33,

37,

41,

48,

52,

56,

60,

71,

75,

79,

83,

6,

10,

14,

18

GOE 0, GOE 1

11

RESET

Y0, Y1, Y2

15

ispEN

16

TDI/IN 0

59

TCK/IN 3

37

TMS/IN 1

87

24

25

61

43

1

TDO/IN 2

10,

65, 60

20

19,

67, 62

62,

13

64,

22

66,

88,

IN 4 - IN 7

Dedicated input pins to the device

Global Output Enable input pins

Active Low (0) Reset pin which resets all the registers in the device.

Dedicated Clock input. This clock input is connected to one of the clock

inputs of all the GLBs in the device.

Input — Dedicated in-system programming Boundary Scan enable input

pin. This pin is brought low to enable the programming mode. The TMS,

TDI, TDO and TCK controls become active.

Input — This pin performs two functions. When

ispEN is logic low, it

functions as a serial data input pin to load programming data into the

device. When

ispEN is high, it functions as a dedicated input pin.

Input — This pin performs two functions. When

ispEN is logic low, it

functions as a clock pin for the ISP/Boundary Scan state machine.

When

ispEN is high, it functions as a dedicated input pin.

Input — This pin performs two functions. When

ispEN is logic low, it

functions as a mode control pin for the ISP/Boundary Scan state

machine. When

ispEN is high, it functions as a dedicated input pin.

Output/Input — This pin performs two functions. When

ispEN is logic

low, it functions as an output pin to read serial shift register data. When

ispEN is high, it functions as a dedicated input pin.

Ground (GND)

VCC

14, 39,

61,

86

12, 36, 63,

89

23, 44,

63,

84

2,

21, 42,

65

4,

21, 25,

31,

44, 50, 54,

64,

71,

100

75, 81,

94,

66

38,

9

GND

Vcc

No Connect.

1. NC pins are not to be connected to any active signal, VCC or GND.