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XRT85L61 Datasheet(PDF) 6 Page - Exar Corporation |
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XRT85L61 Datasheet(HTML) 6 Page - Exar Corporation |
6 / 16 page XRT85L61 BITS (BUILDING INTEGRATED TIMING SUPPLY) CLOCK EXTRACTOR REV. 1.0.1 5 25 8 kHz_LCV/ BPV O Line Code Violation for 8 kHz in 64 kHz operation Bipolar Violation: In E1RZ or T1 mode, every Bipolar violation valid or not valid is indicated at this pin. This pin will stay “High” when 8 kHz is not in sync. 26 RCLK_LCV/AIS O Receive Clock Violation. In 64 kbps operation, every missing pulse will cause this pin to go “High” for half the clock cycle AIS Indication In E1RZ or T1 mode, this output serves as an AIS indicator. AIS will stay “High” for 250 µs in E1 RZ mode, and in T1 mode, AIS will stay “High” for 3 ms. 27 DATA_INV I Data Invert: Connect this pin “High” to output active “Low” data at RPOS/RNEG. NOTE: Internally Pulled down with 50 k Ω resistor 28 RCLK_INV I Receive Clock Invert: Connect this pin “High” to align the data to change at the falling edge of RCLK. NOTE: Internally Pulled down with 50 k Ω resistor PIN DESCRIPTIONS PIN #SYMBOL TYPE DESCRIPTION |
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