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54S X Fam ily F P G A s
SX Pro b e Cir c u i t Co ntro l Pin s
The Silicon Explorer II tool uses the boundary scan ports
(TDI, TCK, TMS and TDO) to select the desired nets for
verification. The selected internal nets are assigned to the
PRA/PRB pins for observation. Figure 7 illustrates the
interconnection between Silicon Explorer II and the FPGA
to perform in-circuit verification. The TRST pin is equipped
with a pull-up resistor. To remove the boundary scan state
machine from the reset state during probing, it is
recommended that the TRST pin be left floating.
De s i g n Co ns id e r at io ns
The TDI, TCK, TDO, PRA, and PRB pins should not be used
as input or bidirectional ports. Because these pins are
active during probing, critical signals input through these
pins are not available while probing. In addition, the
Security Fuse should not be programmed because doing so
disables the Probe Circuitry.
Figure 7 • Probe Setup
SX FPGA
TDI
TCK
TDO
TMS
PRA
PRB
Serial Connection
Silicon Explorer II