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MK1707DILF Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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MK1707DILF Datasheet(HTML) 2 Page - Integrated Circuit Systems |
2 / 7 page Low EMI Clock Generator MDS 1707D F 2 Revision 102804 Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com MK1707D Pin Assignment Spread Selection Table (MHz) 0 = connect to GND M = unconnected (floating) has internal resistor network Leave it open (unconnected) 1 = connect to VDD Pin Descriptions X1/ICLK VDD GND S1 CLK S0 LEE X2 1 2 3 4 8 7 6 5 8 pin (150 mil) SOIC S1 Pin 7 S0 Pin 6 Spread Direction Spread (%) Input Frequency 0 0 Center ±1.15 25-54 0 M Center ±0.95 25-54 0 1 Center ±1.9 50-108 1 0 Center ±1.6 25-54 1 M Center ±1.9 25-54 1 1 Center ±0.6 50-108 Pin Number Pin Name Pin Type Pin Description 1 X1/ICLK Input Crystal connection. Connect crystal or clock input. 2 VDD Power Connect to +3.3 V. 3 GND Power Connect to ground. 4 CLK Output Spread spectrum clock output per table above. 5 LEE Input Low EMI enable. Turns on spread spectrum when high. Internal pull-up resistor. Disables the spread spectrum feature when low. 6 S0 Input Function select input. Selects spread amount and direction per table above. Internal mid-level. 7 S1 Input Function select 1 input. Selects spread amount and direction per table above. Internal mid-level. 8 X2 XO Crystal connection. Leave unconnected for clock input. |
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