4

All data sheets are subject to change without notice

©2002 Maxwell Technologies

All rights reserved.

12-Bit A/D Converter

7672

08.09.02 REV 13

Bipolar Zero Error

BZE

T

°

C

T

°

C

1

2, 3

--

--

±5

±6

LSB

Bipolar Gain Error

BGE

T

°

C

T

°

C

1

2, 3

--

--

±5

±7

LSB

1. Guaranteed by design.

(V

1. 1LSB = FS/4096; T

°

C; Performance over power supply tolerance is guaranteed by power supply rejection test.

2. All inputs are 0V to +5V swing with t

3. Functionally tested.

12.5 clks, TA = -55 to +125 °C

9, 10, 11

tCONV

--

5.0

us

Conversion Time, Asynchronous Clk,

12-13 clks, TA = -55 to +125 °C

9, 10, 11

tCONV

4.8

5.2

us

CS to RD Setup Time

TA = -55 to +125 °C

9, 10, 11

t1

0

--

ns

RD to BUSY Delay

CL = 50 pF, TA = +25 °C

CL = 50 pF, TA = -55 to +125 °C

9

10, 11

t2

--

--

190

270

ns

4. t3 and t6 are measured with the load circuits of Figure 1 and are defined as the time required for an output to cross +0.8 or

+2.4.

CL = 100 pF, TA = +25 °C

CL = 100 pF, TA = -55 to +125 °C

9

10, 11

t3

--

--

125

170

ns

RD Pulse Width

TA = -55 to +125 °C

9, 10, 11

t4

t3

--

ns

CS to RD Hold Time

TA = -55 to +125 °C

9, 10, 11

t5

0

--

ns

Data Setup Time After BUSY4

CL = 100 pF, TA = +25 °C

CL = 100 pF, TA = -55 to +125 °C

9

10, 11

t6

--

--

--

70

100

ns

5. t7 is defined as the time required for the data lines to change 0.5V when loaded with the circuit of Figure 2.

(TA = +25 °C)

(-55 < TA < +125 °C)

9

10, 11

t7

--

--

75

90

ns

Delay Between Read Operations

(-55 < TA < +125 °C)

9, 10, 11

t8

200

--

ns

(V