5

All data sheets are subject to change without notice

©2002 Maxwell Technologies

All rights reserved.

(8K x 16-Bit) Dual Port RAM High-Speed CMOS

7025E

08.15.02 Rev 2

-35

-45

t

SW

9, 10, 11

30

40

--

--

ns

Address Setup Time

-35

-45

t

AS

9, 10, 11

0

0

--

--

ns

Write Pulse Width

-35

-45

t

WP

9, 10, 11

30

35

--

--

ns

Write Recovery Time

-35

-45

t

WR

9, 10, 11

0

0

--

--

ns

Data Valid to End of Write

-35

-45

t

DW

9, 10, 11

25

25

--

--

ns

-35

-45

t

HZ

9, 10, 11

--

--

20

20

ns

Data Hold Time

-35

-45

t

DH

9, 10, 11

0

0

--

--

ns

-35

-45

t

WZ

9, 10, 11

--

--

20

20

ns

-35

-45

t

OW

9, 10, 11

0

0

--

--

ns

SEM Flag Write to Read Time

-35

-45

t

SWRD

10

10

--

--

ns

SEM Flag Contention Window

-35

-45

t

SPS

10

10

--

--

ns

1. To access RAM, CS = V

valid for the entire t

2. Guaranteed by design.

3. Transition is measured ± 500 mV from low or high impedance voltage with load.

4. The specification for t

and t

(V

°

C)