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ASM2I9942PG-32-ER Datasheet(PDF) 1 Page - Alliance Semiconductor Corporation |
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ASM2I9942PG-32-ER Datasheet(HTML) 1 Page - Alliance Semiconductor Corporation |
1 / 10 page May 2005 ASM2I9942P rev 0.3 Alliance Semiconductor 2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. Low Voltage 1:18 Clock Distribution Chip Features LVPECL Clock Input 2.5V LVCMOS Outputs for Pentium II TM* Microprocessor Support 200pS Maximum Targeted Output–to–Output Skew Maximum Output Frequency of 250MHz @3.3 VCC 32–Lead LQFP and TQFP Packaging Single 3.3V or 2.5V Supply Pin and Function compatible with MPC942P Functional Description The ASM2I9942P is a 1:18 low voltage clock distribution chip with 2.5V or 3.3V LVCMOS output capabilities. The device is offered in two versions; the ASM2I9942C has an LVCMOS input clock while the ASM2I9942P has a LVPECL input clock. The 18 outputs are 2.5V or 3.3V LVCMOS compatible and feature the drive strength to drive 50Ω series or parallel terminated transmission lines. With output-to-output skews of 200pS, the ASM2I9942P is ideal as a clock distribution chip for the most demanding of synchronous systems. The 2.5V outputs also make the device ideal for supplying clocks for a high performance Pentium II TM microprocessor based design. With low output impedance (≈12Ω), in both the HIGH and LOW logic states, the output buffers of the ASM2I9942P are ideal for driving series terminated transmission lines. With an output impedance of 12Ω, the ASM2I9942P can drive two series terminated transmission lines from each output. This capability gives the ASM2I9942P an effective fanout of 1:36. The ASM2I9942P provides enough copies of low skew clocks for most high performance synchronous systems. The differential LVPECL inputs of the ASM2I9942P allow the device to interface directly with a LVPECL fanout buffer to build very wide clock fanout trees or to couple to a high frequency clock source. The OE pins will place the outputs into a high impedance state. The OE pin has an internal pullup resistor. The ASM2I9942P is a single supply device. The VCC power pins require either 2.5V or 3.3V. The 32 lead LQFP and TQFP package is chosen to optimize performance, board space and cost of the device. The 32–lead LQFP and TQFP have a 7x7mm 2 body size with conservative 0.8mm pin spacing. * Pentium II is a trademark of Intel Corporation Block Diagram Table 1. Function Table OE Output 0 1 HIGH IMPEDANCE OUTPUTS ENABLED Q1-Q16 Q0 Q17 OE (Int. Pullup) PECL_CLK PECL_CLK |
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Similar Description - ASM2I9942PG-32-ER |
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