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ASM5I9352G-32-ET Datasheet(PDF) 8 Page - Alliance Semiconductor Corporation |
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ASM5I9352G-32-ET Datasheet(HTML) 8 Page - Alliance Semiconductor Corporation |
8 / 12 page July 2005 ASM5I9352 rev 0.2 2.5V or 3.3V, 200 MHz, 11-Output Zero Delay Buffer 8 of 12 Notice: The information in this document is subject to change without notice. Figure 1. AC Test Reference for VDD = 3.3V / 2.5V Figure 2. LVCMOS Propagation Delay t( φ), Static Phase Offset DC = tP / T0 x 100% Figure 3. Output Duty Cycle (DC) Figure 4. Output-to-Output Skew , tsk(O) LVCMOS_CLK VDD VDD/2 GND tP T0 tSK(0) VDD VDD/2 GND VDD VDD/2 GND Pulse Generator Z = 50 ohm Zo = 50 ohm RT = 50 ohm VTT VTT RT = 50 ohm Zo = 50 ohm LVCMOS_CLK VDD VDD VDD/2 VDD/2 GND GND t( φ) FB_IN |
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