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ASM1233MS-3 Datasheet(PDF) 3 Page - Alliance Semiconductor Corporation |
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ASM1233MS-3 Datasheet(HTML) 3 Page - Alliance Semiconductor Corporation |
3 / 11 page 3 of 11 Notice: The information in this document is subject to change without notice Low Power, 5V/3.3V, µP Reset, Active LOW, Open-Drain Output ASM1233D-L/D/M rev 1.3 March 2005 Application Information Operation - Power Monitor The ASM1233D-L/1233D/1233M detects out-of-tolerance power supply conditions. It resets a processor during power- up, power-down and generates a reset to the system processor when the monitored power supply voltage is below the reset threshold. When an out-of-tolerance VCC voltage is detected, the RESET signal is asserted. On power-up, RESET is kept active (LOW) for approximately 350ms after the power supply voltage has reached the selected tolerance. This allows the power supply and microprocessor to stabilize before RESET is released. tRPU VLTL VOH VCCTP VHTL tR VCC RESET Figure 1: Timing Diagram: Power-Up VLTL VCCTP VHTL tF VCC tRPD VOL RESET Figure 2: Timing Diagram: Power-Down |
Similar Part No. - ASM1233MS-3 |
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Similar Description - ASM1233MS-3 |
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