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V•I Chip Voltage Transformation Module

V048K030T070

Rev. 1.0

Page 6 of 15

V•I Chip Voltage Transformation Module

PRELIMINARY

Pin/Control Functions

+IN/-IN DC Voltage Ports

The VTM input should not exceed the maximum specified. Be aware of

this limit in applications where the VTM is being driven above its

nominal output voltage. If less than 26 Vdc is present at the +In and -In

ports, a continuous VC voltage must be applied for the VTM to process

power. Otherwise VC voltage need only be applied for 10 ms after the

voltage at the +In and -In ports has reached or exceeded 26 Vdc. If the

input voltage exceeds the overvoltage turn-off, the VTM will shutdown.

The VTM does not have internal input reverse polarity protection.

Adding a properly sized diode in series with the positive input or a

fused reverse-shunt diode will provide reverse polarity protection.

TM – For Factory Use Only

VC – VTM Control

upstream PRM, synchronizing the output rise of the VTM with the

output rise of the PRM. Additionally, the VC port provides feedback to

the PRM to compensate for the VTM output resistance. In typical

applications using VTMs powered from PRMs, the PRM’s VC port

should be connected to the VTM VC port.

In applications where a VTM is being used without a PRM, 14 V must

be supplied to the VC port for as long as the input voltage is below 26 V

and for 10 ms after the input voltage has reached or exceeded 26 V. The

VTM is not designed for extended operation below 26 V. The VC port

PC – Primary Control

The Primary Control (PC) port is a multifunction port for controlling the

VTM as follows:

Disable – If PC is left floating, the VTM output is enabled. To

disable the output, the PC port must be pulled lower than 2.4 V,

referenced to -In. Optocouplers, open collector transistors or relays

can be used to control the PC port. Once disabled, 14 V must be

re-applied to the VC port to restart the VTM.

Primary Auxiliary Supply – The PC port can source up to 2.4 mA

at 5 Vdc.

+OUT/-OUT DC Voltage Output Ports

The output and output return are through two sets of contact

locations. The respective +Out and –Out groups must be connected in

parallel with as low an interconnect resistance as possible. Within the

specified input voltage range, the Level 1 DC behavioral model shown

in Figure 19 defines the output voltage of the VTM. The current source

capability of the VTM is shown in the specification table.

To take full advantage of the VTM, the user should note the low output

impedance of the device. The low output impedance provides fast

transient response without the need for bulk POL capacitance. Limited-

life electrolytic capacitors required with conventional converters can be

reduced or even eliminated, saving cost and valuable board real estate.

-In

PC

VC

TM

+In

-Out

+Out

-Out

+Out

Bottom View

A

B

C

D

E

F

G

H

J

K

L

M

N

P

R

T

U

V

W

Y

AA

AB

AC

AD

AE

AF

AG

AH

AJ

AK

AL

4 3

2 1

A

B

C

D

E

F

G

H

J

K

L

M

N

P

R

T

U

V

W

Y

AA

AB

AC

AD

AE

AF

AG

AH

AJ

AK

AL

Figure 9—VTM BGA configuration

Signal Name

BGA Designation

+In

A1-L1, A2-L2

–In

AA1-AL1, AA2-AL2

TM

P1, P2

VC

T1, T2

PC

V1, V2

+Out

A3-G3, A4-G4,

U3-AC3, U4-AC4

–Out

J3-R3, J4-R4,

AE3-AL3, AE4-AL4