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MUN2114T1 Datasheet(PDF) 1 Page - ON Semiconductor |
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MUN2114T1 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 12 page Semiconductor Components Industries, LLC, 2005 January, 2005 − Rev. 14 Publication Order Number: MUN2111T1/D 1 MUN2111T1 Series Preferred Devices Bias Resistor Transistors PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network This new series of digital transistors is designed to replace a single device and its external resi st or bias network. The Bias Resistor Transistor (BRT) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the SC−59 package which is designed for low power surface mount applications. • Simplifies Circuit Design • Reduces Board Space • Reduces Component Count • Moisture Sensitivity Level: 1 • ESD Rating − Human Body Model: Class 1 ESD Rating − Machine Model: Class B • The SC−59 package can be soldered using wave or reflow. The modified gull−winged leads absorb thermal stress during soldering eliminating the possibility of damage to the die. • Pb−Free Package is Available MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Rating Symbol Value Unit Collector−Base Voltage VCBO 50 Vdc Collector−Emitter Voltage VCEO 50 Vdc Collector Current IC 100 mAdc THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Total Device Dissipation TA = 25°C Derate above 25°C PD 230 (Note 1) 338 (Note 2) 1.8 (Note 1) 2.7 (Note 2) mW °C/W Thermal Resistance − Junction−to−Ambient RqJA 540 (Note 1) 370 (Note 2) °C/W Thermal Resistance − Junction−to−Lead RqJL 264 (Note 1) 287 (Note 2) °C/W Junction and Storage Temperature Range TJ, Tstg −55 to +150 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. FR−4 @ Minimum Pad. 2. FR−4 @ 1.0 x 1.0 inch Pad. SC−59 CASE 318D PLASTIC MARKING DIAGRAM PIN 3 COLLECTOR (OUTPUT) PIN 1 EMITTER (GROUND) PIN 2 BASE (INPUT) R1 R2 2 1 3 6x M See detailed ordering and shipping information on page 2 of this data sheet. ORDERING INFORMATION *See device marking table on page 2 of this data sheet. DEVICE MARKING INFORMATION Preferred devices are recommended choices for future use and best overall value. 6x = Specific Device Code* M = Date Code http://onsemi.com |
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