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HD6472345TE Datasheet(PDF) 8 Page - Hitachi Semiconductor |
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HD6472345TE Datasheet(HTML) 8 Page - Hitachi Semiconductor |
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8 / 907 page  ii 2.9 Basic Timing...................................................................................................................... 65 2.9.1 Overview .............................................................................................................. 65 2.9.2 On-Chip Memory (ROM, RAM) ......................................................................... 65 2.9.3 On-Chip Supporting Module Access Timing....................................................... 67 2.9.4 External Address Space Access Timing............................................................... 68 Section 3 MCU Operating Modes ................................................................................ 69 3.1 Overview............................................................................................................................ 69 3.1.1 Operating Mode Selection (F-ZTAT™ Version) ................................................. 69 3.1.2 Operating Mode Selection (ZTAT, Mask ROM, and No On-Chip ROM Versions) .............................................................................................................. 70 3.1.3 Register Configuration ......................................................................................... 72 3.2 Register Descriptions......................................................................................................... 72 3.2.1 Mode Control Register (MDCR).......................................................................... 72 3.2.2 System Control Register (SYSCR) ...................................................................... 73 3.2.3 System Control Register 2 (SYSCR2) (F-ZTAT Version Only) ......................... 74 3.3 Operating Mode Descriptions............................................................................................ 75 3.3.1 Mode 1 (ZTAT, Mask ROM, and No On-Chip ROM Versions Only)................ 75 3.3.2 Mode 2* 1 (ZTAT and Mask ROM Versions Only).............................................. 75 3.3.3 Mode 3* 1 (ZTAT and Mask ROM Versions Only).............................................. 75 3.3.4 Mode 4* 2 .............................................................................................................. 75 3.3.5 Mode 5* 2 .............................................................................................................. 76 3.3.6 Mode 6* 1 .............................................................................................................. 76 3.3.7 Mode 7* 1 .............................................................................................................. 76 3.3.8 Modes 8 and 9 (F-ZTAT Version Only) .............................................................. 76 3.3.9 Mode 10 (F-ZTAT Version Only)........................................................................ 77 3.3.10 Mode 11 (F-ZTAT Version Only)........................................................................ 77 3.3.11 Modes 12 and 13 (F-ZTAT Version Only) .......................................................... 77 3.3.12 Mode 14 (F-ZTAT Version Only)........................................................................ 77 3.3.13 Mode 15 (F-ZTAT Version Only)........................................................................ 77 3.4 Pin Functions in Each Operating Mode............................................................................. 78 3.5 Memory Map in Each Operating Mode............................................................................. 79 Section 4 Exception Handling........................................................................................ 91 4.1 Overview............................................................................................................................ 91 4.1.1 Exception Handling Types and Priority ............................................................... 91 4.1.2 Exception Handling Operation ............................................................................. 92 4.1.3 Exception Vector Table........................................................................................ 92 4.2 Reset .................................................................................................................................. 94 4.2.1 Overview .............................................................................................................. 94 4.2.2 Reset Types .......................................................................................................... 94 4.2.3 Reset Sequence ..................................................................................................... 95 4.2.4 Interrupts after Reset ............................................................................................ 96 |
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