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IW4042B Datasheet(PDF) 2 Page - Integral Corp.

Part # IW4042B
Description  QUAD CLOCKED LATCH
Download  5 Pages
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Manufacturer  INTEGRAL [Integral Corp.]
Direct Link  http://www.iksemi.com/
Logo INTEGRAL - Integral Corp.

IW4042B Datasheet(HTML) 2 Page - Integral Corp.

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IW4042B
2
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
-0.5 to +20
V
VI
DC Input Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
VOUT
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
II
DC Input Current, per Pin
±10
mA
PD
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
Ptot r Dissipation per Output Transistor
100
mW
Tstg
Storage Temperature
-65 to +150
°C
TL
Lead Temperature, 1 mm from Case for 10
Seconds
(Plastic DIP or SOIC Package)
260
°C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
°C from 65° to 125°C
SOIC Package: : - 7 mW/
°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage (Referenced to GND)
3.0
18
V
VI, VOUT
DC Input Voltage, Output Voltage (Referenced to
GND)
0
VCC
V
TA
Operating Temperature, All Package Types
-55
+125
°C
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and
VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
VCC). Unused outputs must be left open.


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