SN74LS377

http://onsemi.com

3

Limits

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

Input HIGH Voltage

2.0

V

Guaranteed Input HIGH Voltage for

All Inputs

Input LOW Voltage

0.8

V

Guaranteed Input LOW Voltage for

All Inputs

Input Clamp Diode Voltage

– 0.65

– 1.5

V

Output HIGH Voltage

2.7

3.5

V

Output LOW Voltage

0.25

0.4

V

V

V

or V

Output LOW Voltage

0.35

0.5

V

per Truth Table

I

Input HIGH Current

20

µA

Input HIGH Current

0.1

mA

Input LOW Current

– 0.4

mA

Short Circuit Current (Note 1)

–20

– 100

mA

Power Supply Current

28

mA

Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

Limits

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

Maximum Clock Frequency

30

40

MHz

Propagation Delay,

Clock to Output

17

18

27

27

ns

Limits

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

Any Pulse Width

20

ns

Data Setup Time

20

ns

t

Enable Setup

Inactive — State

10

ns

Time

Active — State

25

ns

Any Hold Time

5.0

ns

DEFINITION OF TERMS

SETUP TIME (ts) — is defined as the minimum time

required for the correct logic level to be present at the logic

input prior to the clock transition from LOW-to-HIGH in

order to be recognized and transferred to the outputs.

following the clock transition from LOW-to-HIGH that the

logic level must be maintained at the input in order to ensure

continued recognition. A negative HOLD TIME indicates

that the correct logic level may be released prior to the clock

transition from LOW-to-HIGH and still be recognized.