M381L2923BUM-CB3 datasheet(8/25 Pages) SAMSUNG

Part #	M381L2923BUM-CB3

Description	DDR SDRAM Unbuffered Module 184pin Unbuffered Module based on 512Mb B-die with 64/72-bit Non ECC/ECC 66 TSOP-II

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Manufacturer	SAMSUNG [Samsung semiconductor]

Direct Link	http://www.samsung.com/Products/Semiconductor

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DDR SDRAM

256MB, 512MB, 1GB Unbuffered DIMM

Rev. 1.1 June 2005

(Populated as 1 bank of x8 DDR SDRAM Module)

6.3 512MB, 64M x 72 ECC Module (M381L6523BT(U))

A0 - A12

A0-A12 : DDR SDRAMs D0 - D8

RAS

RAS : DDR SDRAMs D0 - D8

CAS

CAS : DDR SDRAMs D0 - D8

WE

WE : DDR SDRAMs D0 - D8

CKE0

CKE : DDR SDRAMs D0 - D8

BA0 - BA1

BA0-BA1 : DDR SDRAMs D0 - D8

VSS

D0 - D8

VDD/VDDQ

D0 - D8

VREF

VDDSPD

SPD

D0 - D8

*Clock Net Wiring

* Clock Wiring

Clock

Input

DDR SDRAMs

*CK0/CK0

*CK1/CK1

*CK2/CK2

3 DDR SDRAMs

A0

Serial PD

A1

A2

SA0

SA1

SA2

SCL

SDA

WP

CS0

DQS0

DM0

DM/

CS

DQS

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

D0

DQS1

DM1

DM/

CS

DQS

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

D1

DQS2

DM2

DM/

CS

DQS

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

D2

DQS3

DM3

DM/

CS

DQS

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

D3

DQS4

DM4

DM/

CS

DQS

DQ32

DQ33

DQ34

DQ35

DQ36

DQ37

DQ38

DQ39

D4

DQS5

DM5

DM/

CS

DQS

DQ40

DQ41

DQ42

DQ43

DQ44

DQ45

DQ46

DQ47

D5

DQS6

DM6

DM/

CS

DQS

DQ48

DQ49

DQ50

DQ51

DQ52

DQ53

DQ54

DQ55

D6

DQS7

DM7

DM/

CS

DQS

DQ56

DQ57

DQ58

DQ59

DQ60

DQ61

DQ62

DQ63

D7

I/O 6

I/O 4

I/O 2

I/O 0

I/O 7

I/O 5

I/O 3

I/O 1

I/O 7

I/O 5

I/O 1

I/O 0

I/O 6

I/O 4

I/O 3

I/O 2

I/O 6

I/O 5

I/O 3

I/O 0

I/O 7

I/O 4

I/O 2

I/O 1

I/O 7

I/O 4

I/O 3

I/O 1

I/O 6

I/O 5

I/O 2

I/O 0

I/O 7

I/O 4

I/O 3

I/O 0

I/O 6

I/O 5

I/O 2

I/O 1

I/O 6

I/O 4

I/O 3

I/O 2

I/O 7

I/O 5

I/O 1

I/O 0

I/O 7

I/O 6

I/O 1

I/O 0

I/O 5

I/O 4

I/O 3

I/O 2

I/O 5

I/O 4

I/O 1

I/O 0

I/O 7

I/O 6

I/O 3

I/O 2

DQS8

DM8

DM/

CS

DQS

CB0

CB1

CB2

CB3

CB4

CB5

CB6

CB7

D8

I/O 5

I/O 4

I/O 3

I/O 1

I/O 7

I/O 6

I/O 2

I/O 0

Card

Edge

D3/D0/D6

Cap/Cap/Cap

D4/D1/D7

Cap/Cap/Cap

D5/D2/D8

Cap/Cap/Cap

R=120

Ω

CK0/1/2

Notes :

1. DQ-to-I/O wiring is shown as recommended

but may be changed.

2. DQ/DQS/DM/CKE/CS relationships must be

maintained as shown.

3. DQ, DQS, DM/DQS resistors: 22 Ohms + 5%.

4. BAx, Ax, RAS, CAS, WE resistors: 5.1 Ohms +

5%

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M381L2923BUM-CB3 Datasheet(PDF) 8 Page - Samsung semiconductor

M381L2923BUM-CB3 Datasheet(HTML) 8 Page - Samsung semiconductor

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