IC43R32400

6

Integrated Circuit Solution Inc.

DDR003-0B 11/10/2004

Supply

Ground: Ground for the input buffers and core logic

.

Supply

DQ Power: Provide isolated power to DQs for improved noise immunity.

Supply

DQ Ground: Provide isolated ground to DQs for improved noise immunity.

Supply

NC

-

No Connect: These pins should be left unconnected.

Note: The timing reference point for the differential clocking is the cross point of the CK and CK#. For any applications

Command

State

CKEn-1 CKEn DM

BA1

BA0 A8 A11-A9,A7-0 CS# RAS# CAS# WE#

BankActivate

H

X

X

V

V

Row address

L

L

H

H

BankPrecharge

Any

H

X

X

V

V

L

X

L

L

H

L

PrechargeAll

Any

H

X

X

X

X

H

X

L

L

H

L

Write

H

X

V

V

V

L

L

H

L

L

H

X

V

V

V

H

L

H

L

L

A0~A7

Read

H

X

X

V

V

L

L

H

L

H

H

X

X

V

V

H

L

H

L

H

A0~A7

Mode Register Set

Idle

H

X

X

L

L

OP code

L

L

L

L

Extended Mode Register Set

Idle

H

X

X

L

H

OP code

L

L

L

L

No-Operation

Any

H

X

X

X

X

X

X

L

H

H

H

Device Deselect

Any

H

X

X

X

X

X

X

H

X

X

X

Burst Stop

H

X

X

X

X

X

X

L

H

H

L

AutoRefresh

Idle

H

H

X

X

X

X

X

L

L

L

H

SelfRefresh Entry

Idle

H

L

X

X

X

X

X

L

L

L

H

SelfRefresh Exit

Idle

L

H

X

X

X

X

X

H

X

X

X

(SelfRefresh)

L

H

H

H

L

X

X

X

X

X

H

X

X

X

L

H

H

H

Power Down Mode Exit

Any

L

H

X

X

X

X

X

H

X

X

X

(PowerDown)

L

H

H

H

Data Write/Output Enable Active

H

X

L

X

X

X

X

X

X

X

X

Data Mask/Output Disable Active

H

X

H

X

X

X

X

X

X

X

X

Column

address

Column

address

Note:

1. V =Valid Data, X =Don ’t care,L =Low level, H = High level

2. CKEn signal is input level when commands are provided.

CKEn-1 signal is input level one clock cycle before the commands are provided.

3. These are states of bank designated by BA1 signals.

4. Read burst stop with BST command for all burst types.

5. Power Down Mode can not enter in the burst operation.

When this command is asserted in the burst cycle,device state is clock suspend mode.

Operation Mode

Fully synchronous operations are performed to latch the commands at the positive edges of CK. Table 2 shows the

truth table for the operation commands.

Table 2. Truth Table (Note (1), (2) )