TMP91C630 datasheet(7/202 Pages) TOSHIBA

Part #	TMP91C630

Description	CMOS 16-Bit Microcontrollers

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Manufacturer	TOSHIBA [Toshiba Semiconductor]

Direct Link	http://www.semicon.toshiba.co.jp/eng

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TMP91C630

2003-07-22

91C630-5

2.2

Pin Names and Functions

The names of the Input/Output pins and their functions are described below.

Table 2.2.1 to Table 2.2.3 show Pin name and functions.

Table 2.2.1 Pin Names and Functions (1/3)

Pin Names

Number

of Pins

I/O

Functions

D0 to D7

8

I/O

Data (lower): Bits 0 to 7 of data bus

P10 to P17

D8 to D15

8

I/O

Port 1: I/O port that allows I/O to be selected at the bit level

(When used to the external 8-bit bus)

Data (upper): Bits 8 to15 of data bus

P20 to P27

A16 to A23

8

Output

Port 2: Output port

Address: Bits 16 to 23 of address bus

A8 to A15

8

Output

Address: Bits 8 to 15 of address bus

A0 to A7

8

Output

Address: Bits 0 to 7 of address bus

RD

1

Output

Read: Strobe signal for reading external memory

WR

1

Output

Write: Strobe signal for writing data to pins D0 to D7

P53

BUSRQ

1

I/O

Input

Port 53: I/O port (with pull-up resistor)

Bus request: Signal used to request bus release (high-impedance).

P54

BUSAK

1

I/O

Output

Port 54: I/O port (with pull-up resistor)

Bus acknowledge: Signal used to acknowledge bus release

(high-impedance).

P55

WAIT

1

I/O

Input

Port 55: I/O port (with pull-up resistor)

Wait: Pin used to request CPU bus wait. ((1

N) waits mode)

P56

INT0

1

I/O

Input

Port 56: I/O port (with pull-up resistor)

Interrupt request pin0: Interrupt request pin with programmable level/rising

edge/falling edge

P60

CS0

1

Output

Port 60: Output port

Chip select 0: Outputs 0 when address is within specified address area.

P61

CS1

1

Output

Port 61: Output port

Chip select 1: Outputs 0 when address is within specified address area.

P62

CS2

1

Output

Port 62: Output port

Chip select 2: Outputs 0 when address is within specified address area.

P63

3

CS

1

Output

Port 63: Output port

Chip select 3: Outputs 0 when address is within specified address area.

P70

TA0IN

INT1

1

I/O

Input

Port 70: I/O port

8-bit TMRA0 input

Interrupt request pin 1: Interrupt request pin with programmable level/rising

edge/falling edge

P71

TA1OUT

1

I/O

Output

Port 71: I/O port

8-bit TMRA0 or 8-bit TMRA1 output

P72

TA3OUT

INT2

1

I/O

Output

Input

Port 72: I/O port

8-bit TMRA2 or 8-bit TMRA3 output

Interrupt request pin 2: Interrupt request pin with programmable level/rising

edge/falling edge

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