Under development

M16C/30P Group

2. Central Processing Unit (CPU)

Preliminary specification

Specifications in this manual are tentative and subject to change.

Rev.0.80

Mar 18, 2005

Page 11 of 34

REJ03B0088-0080

2.8.8

Stack Pointer Select Flag (U Flag)

ISP is selected when the U flag is “0”; USP is selected when the U flag is “1”.

The U flag is cleared to “0” when a hardware interrupt request is accepted or an INT instruction for software

interrupt Nos. 0 to 31 is executed.

2.8.9

Processor Interrupt Priority Level (IPL)

IPL is configured with three bits, for specification of up to eight processor interrupt priority levels from level 0

to level 7.

If a requested interrupt has priority greater than IPL, the interrupt is enabled.

2.8.10

Reserved Area

When write to this bit, write “0”. When read, its content is indeterminate.