PI6C48535-01LE datasheet(2/5 Pages) PERICOM

Part #	PI6C48535-01LE

Description	3.3V Low Skew 1-to-4 LVTTL/LVCMOS to LVPECL Fanout Buffer

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Manufacturer	PERICOM [Pericom Semiconductor Corporation]

Direct Link	http://www.pericom.com

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PI6C48535-01

3.3V Low Skew 1-to-4

LVTTL/LVCMOS to LVPECL Fanout Buffer

2

PS8735A

11/15/05

Pin Description

Name

Pin #

Type

Description

VEE

1

P

Connect to Negative power supply

CLK_EN

2

I_PU

Synchronizing clock enable. When high, clock outputs follow clock input. When low, Qx

outputs are forced low, nQx outputs are forced high. LVCMOS/LVTTL level with 50KΩ

pull up.

CLK_SEL

3

I_PD

Clock select input. When high, selects CLK1 input. When low, selects CLK0 input.

LVCMOS/LVTTL level with 50KΩ pull down.

CLK0

4

I_PD

LVCMOS / LVTTL clock input

CLK1

6

I_PD

LVCMOS / LVTTL clock input

NC

5, 7, 8, 9

No internal connection.

VCC

10, 13,

18

P

Connect to 3.3V.

Q3, nQ3

11, 12

O

Differential output pair, LVPECL interface level.

Q2, nQ2

14, 15

O

Differential output pair, LVPECL interface level.

Q1, nQ1

16, 17

O

Differential output pair, LVPECL interface level.

Q0, nQ0

19, 20

O

Differential output pair, LVPECL interface level.

Notes:

1. I = Input, O = Output, P = Power supply connection, I_PD = Input with pull down, I_PU = Input with pull up.

Pin Characteristics

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

CIN

Input Capacitance

4

pF

R_pullup

Input Pullup Resistance

50

KΩ

R_pulldown

Input Pulldown Resistance

50

Control Input Function Table

Inputs

Outputs

CLK_EN

CLK_SEL

Selected Source

Q0:Q3

nQ0:nQ3

0

CLK0

Diasbled: Low

Diasbled: High

0

1

CLK1

Disabled: Low

Disabled: High

1

0

CLK0

Enabled

1

CLK1

Enabled

Notes:

1. After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as show below.

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PI6C48535-01LE Datasheet(PDF) 2 Page - Pericom Semiconductor Corporation

PI6C48535-01LE Datasheet(HTML) 2 Page - Pericom Semiconductor Corporation

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