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LTC4230IGN Datasheet(PDF) 9 Page - Linear Technology |
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LTC4230IGN Datasheet(HTML) 9 Page - Linear Technology |
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9 / 36 page  9 LTC4230 4230f PI FU CTIO S GATE 1 (Pin 8): The output signal at this pin is the high side gate drive for Channel 1’s external N-channel FET pass transistor. An internal charge pump produces a 4.5V (minimum) to 18V (maximum) gate drive voltage for supplies in the range of 2.7V ≤ VCC1 ≤ 16.5V, respectively. As shown in the Block Diagram, each channel’s internal charge pump is powered by VCC1 and supplies a 10µA gate current and sufficient gate voltage drive to the external FET. The internal charge pump produces a minimum 4.5V gate voltage drive for VCC1 < 4.75V. For VCC1 > 4.75V, the minimum gate voltage drive is 9V. For VCC1 ≥ 12V, the minimum gate voltage drive is 7V which is set by an internal zener diode clamp connected between the GATE 1 pin and GND. RESET 1 (Pin 9): An open-drain N-channel device whose source connects to GND (Pin 14). This pin pulls low if the voltage at FB1 (Pin 10) falls below the FB1 threshold (1.234V). During the start-up cycle, RESET 1 goes high impedance at the end of the second timing cycle after FB1 goes above the FB1 threshold. This pin requires an exter- nal pull-up resistor to VOUT1. If an undervoltage lockout condition occurs, RESET 1 pulls low independently of FB1 to prevent false glitches. FB1 (Pin 10): The FB1 (Feedback) pin is an input to the FBCOMP1 comparator which monitors the VCC1 output supply voltage through an external resistor divider. If VFB1 < 1.234V, RESET 1 pin pulls low. An internal glitch filter at FBCOMP3’s output prevents triggering a reset condition due to negative voltage transients. If VFB1 > 1.237V after the second timing cycle, RESET 1 goes high. FILTER (Pin 11): Overcurrent Fault Timing Pin and Over- voltage Fault Set Pin. With a capacitor connected from this pin to ground, the response time of all three SLOW COMP comparators can be adjusted. Note that the response time of the SLOW COMP comparators cannot be adjusted individually. TIMER (Pin 12): A capacitor connected from this pin to GND sets the LTC4230’s system timing. The LTC4230’s initial and second start-up timing cycles and its discharge mode delay time are controlled by this capacitor. FAULT (Pin 13): FAULT is a dual function (an input and an output) internal to the LTC4230. Connected to this pin are an analog comparator (COMP6) and an open-drain N-channel FET. During normal operation, if COMP6 is driven below 1.234V, all electronic circuit breakers trip and each GATE pin pulls low. Referring to the Block Diagram, FAULT incorporates an internal 2 µA current source pull up. This allows the LTC4230 to begin a second timing cycle (VFAULT > 1.284V) and start up properly. This also allows the use of the FAULT pin as a status output. Under normal operating conditions, the FAULT output is a logic high. Two conditions cause an active low on FAULT: 1) the LTC4230’s electronic circuit breakers trip because of an output short circuit (VOUTn = 0V) or because of a fast output overcurrent transient (FAST COMP n trips its circuit breaker); or 2) VFILTER > 1.26V. The FAULT output is driven to logic low and is latched logic low until the ON pin is driven to logic low for 30 µs (the tRESET duration). GND (Pin 14): Device Ground Connection. Connect this pin to the system’s analog ground plane. ON (Pin 15): An active high signal used to enable or disable LTC4230 operation. As shown in the LTC4230 Block Diagram, COMP1’s threshold is set at 1.234V and its hysteresis is set at 80mV. If a logic high signal is applied to the ON pin (VON > 1.314V), the first timing cycle begins if an overvoltage condition does not exist on any of the GATE n pins (Pins 3, 8, and 18). If a logic low signal is applied to the ON pin (VON < 1.234V), each GATEn pin is pulled low by an internal, dedicated 200 µA current sink. The ON pin can also be used to reset all three electronic circuit breakers. If the ON pin is cycled low for more than 1 tRESETn(MAX) period and then high following a circuit breaker trip, all internal circuit breakers are reset and the LTC4230 begins a new start-up cycle. VCC2 (Pin 16): Positive Supply Input for Channel 2. VCC2 operates from 2.375V to 16.5V and its supply current, ICC2, is typically 75µA. The master UVLO circuit disables all three GATE n outputs of the LTC4230 until the voltage at VCC2 exceeds 2.15V. |
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