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HM6264ALSP-12L Datasheet(PDF) 5 Page - Hitachi Semiconductor

Part # HM6264ALSP-12L
Description  8192-word x 8-bit High Speed CMOS Static RAM
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Manufacturer  HITACHI [Hitachi Semiconductor]
Direct Link  http://www.renesas.com/eng
Logo HITACHI - Hitachi Semiconductor

HM6264ALSP-12L Datasheet(HTML) 5 Page - Hitachi Semiconductor

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AC Characteristics (VCC = 5 V ± 10%, Ta = 0 to +70°C)
AC Test Conditions:
• Input pulse levels: 0.8 V/2.4 V
• Input rise and fall time: 10 ns
• Input timing reference level: 1.5 V
• Output timing reference level
— HM6264A-10: 1.5 V
— HM6264A-12/15: 0.8 V/2.0 V
• Output load: 1 TTL gate and CL (100 pF) (including scope and jig)
Read Cycle
HM6264A-10
HM6264A-12
HM6264A-15
———————
———————
———————
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Unit
Read cycle time
tRC
100
120
150
ns
Address access time
tAA
100
120
150
ns
CS1
tCO1
100
120
150
ns
CS2
tCO2
100
120
150
ns
Output enable to output valid
tOE
—50
60
—70
ns
CS1
tLZ1
10
10
15
ns
CS2
tLZ2
10
10
15
ns
Output enable to output in low Z
tOLZ
5—
5—
5—
ns
CS1
tHZ1
035
0
40
050
ns
CS2
tHZ2
035
0
40
050
ns
Output disable to output in high Z
t
OHZ
035
0
40
050
ns
Output hold from address change
t
OH
10
10
10
ns
Notes
1. tHZ and tOHZ are defined as the time at which the outputs to achieve the open circuit
condition and are not referred to output voltage levels.
2. At any given temperature and voltage condition, tHZ maximum is less than tLZ minimum both for
a given device and from device to device.
Chip deselection to
output in high Z
Chip selection to output
in low Z
Chip selection to output
5
HM6264A Series
HM6264A Series


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